JPS5597756A - Level supervisory system for carrier terminal equipment - Google Patents

Level supervisory system for carrier terminal equipment

Info

Publication number
JPS5597756A
JPS5597756A JP514379A JP514379A JPS5597756A JP S5597756 A JPS5597756 A JP S5597756A JP 514379 A JP514379 A JP 514379A JP 514379 A JP514379 A JP 514379A JP S5597756 A JPS5597756 A JP S5597756A
Authority
JP
Japan
Prior art keywords
circuits
supervisory
level
gate
level supervisory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP514379A
Other languages
Japanese (ja)
Inventor
Kimihiro Ishitobi
Miyoji Ooyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP514379A priority Critical patent/JPS5597756A/en
Publication of JPS5597756A publication Critical patent/JPS5597756A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J1/00Frequency-division multiplex systems
    • H04J1/02Details
    • H04J1/16Monitoring arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To simplify supervisory operation by adding gate circuits and gate driver circuits to a level supervisory output and then by mutually connecting respective gate circuit outputs and leading them to a level supervisory meter. CONSTITUTION:Gate circuits 2a, 2b...2n are provided corresponding to level supervisory items and gate driver circuits 3a...3n are opened corresponding to respective decision signals of circuits 2a...2n. Those decision signals are supplied from gate synchronous circyit 7 to circuits 3a...3n at intervals of fixed time and supervisory level outpus 1a...1n are connected to all of circuits 2a...2n to exercise a level supervision. Consequently, supervisory operation can be simplified even in case of the supervision over several levels.
JP514379A 1979-01-19 1979-01-19 Level supervisory system for carrier terminal equipment Pending JPS5597756A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP514379A JPS5597756A (en) 1979-01-19 1979-01-19 Level supervisory system for carrier terminal equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP514379A JPS5597756A (en) 1979-01-19 1979-01-19 Level supervisory system for carrier terminal equipment

Publications (1)

Publication Number Publication Date
JPS5597756A true JPS5597756A (en) 1980-07-25

Family

ID=11603071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP514379A Pending JPS5597756A (en) 1979-01-19 1979-01-19 Level supervisory system for carrier terminal equipment

Country Status (1)

Country Link
JP (1) JPS5597756A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4858711A (en) * 1971-11-22 1973-08-17
JPS50144313A (en) * 1974-05-10 1975-11-20

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4858711A (en) * 1971-11-22 1973-08-17
JPS50144313A (en) * 1974-05-10 1975-11-20

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