JPS53121541A - Logic circuit diagnosis processing method - Google Patents
Logic circuit diagnosis processing methodInfo
- Publication number
- JPS53121541A JPS53121541A JP3636477A JP3636477A JPS53121541A JP S53121541 A JPS53121541 A JP S53121541A JP 3636477 A JP3636477 A JP 3636477A JP 3636477 A JP3636477 A JP 3636477A JP S53121541 A JPS53121541 A JP S53121541A
- Authority
- JP
- Japan
- Prior art keywords
- processing method
- logic circuit
- diagnosis processing
- circuit diagnosis
- trouble
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE: To find out the cause of the trouble with a reduced number of the probing frequency, by searching and displaying the fault cause based on each mode given from the input pattern memory part, trouble details memory part and the trouble contents memory part respectively.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3636477A JPS53121541A (en) | 1977-03-31 | 1977-03-31 | Logic circuit diagnosis processing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3636477A JPS53121541A (en) | 1977-03-31 | 1977-03-31 | Logic circuit diagnosis processing method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS53121541A true JPS53121541A (en) | 1978-10-24 |
JPS6137653B2 JPS6137653B2 (en) | 1986-08-25 |
Family
ID=12467768
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3636477A Granted JPS53121541A (en) | 1977-03-31 | 1977-03-31 | Logic circuit diagnosis processing method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53121541A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02242376A (en) * | 1989-03-15 | 1990-09-26 | Nishimura Giken:Kk | Drawing and simulation device for logic circuit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5042759A (en) * | 1973-05-28 | 1975-04-18 | ||
JPS51138358A (en) * | 1975-05-26 | 1976-11-29 | Nec Corp | Electronic circuit testing apparatus |
-
1977
- 1977-03-31 JP JP3636477A patent/JPS53121541A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5042759A (en) * | 1973-05-28 | 1975-04-18 | ||
JPS51138358A (en) * | 1975-05-26 | 1976-11-29 | Nec Corp | Electronic circuit testing apparatus |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02242376A (en) * | 1989-03-15 | 1990-09-26 | Nishimura Giken:Kk | Drawing and simulation device for logic circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6137653B2 (en) | 1986-08-25 |
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