JPS5588456A - Access control system for common circuit - Google Patents

Access control system for common circuit

Info

Publication number
JPS5588456A
JPS5588456A JP15933978A JP15933978A JPS5588456A JP S5588456 A JPS5588456 A JP S5588456A JP 15933978 A JP15933978 A JP 15933978A JP 15933978 A JP15933978 A JP 15933978A JP S5588456 A JPS5588456 A JP S5588456A
Authority
JP
Japan
Prior art keywords
point
memory
frame
circuit
transmission frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15933978A
Other languages
Japanese (ja)
Other versions
JPS5846099B2 (en
Inventor
Kazuhiko Yokoyama
Shiro Asami
Takemi Arita
Fumiaki Ishino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP53159339A priority Critical patent/JPS5846099B2/en
Publication of JPS5588456A publication Critical patent/JPS5588456A/en
Publication of JPS5846099B2 publication Critical patent/JPS5846099B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]

Landscapes

  • Small-Scale Networks (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To realize a common circuit access control system which is capable of transmitting the transmission frame onto the data channel through a simple constitution of the device. CONSTITUTION:With occurrence of transmission frame X from transmission frame generation source 11, stack memory 9 possessing the first-in/first-out mechanism transfers frame X to generation source 11-memory 9 according to the idle state to secure the signal queuing state. Detector circuit 5 detects the break (closing flag of frame B) on the data channel and then sets the sign of insertion for the transmission frame. With this insertion sign setting, the branch insertion action is started at point P to insert frame X into the output of common circuit 1 from memory 9 through point P. At the same time, frames C and D flowing to point P through circuit 1 are stored in sequence into memory 9 via line l. When the storage data features the idle state by transmitting frames C and D, circuit 5 also resets the insertion sign to stop the branch/insertion action at point P.
JP53159339A 1978-12-26 1978-12-26 Common line access control method Expired JPS5846099B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53159339A JPS5846099B2 (en) 1978-12-26 1978-12-26 Common line access control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53159339A JPS5846099B2 (en) 1978-12-26 1978-12-26 Common line access control method

Publications (2)

Publication Number Publication Date
JPS5588456A true JPS5588456A (en) 1980-07-04
JPS5846099B2 JPS5846099B2 (en) 1983-10-14

Family

ID=15691664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53159339A Expired JPS5846099B2 (en) 1978-12-26 1978-12-26 Common line access control method

Country Status (1)

Country Link
JP (1) JPS5846099B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57142056A (en) * 1981-02-27 1982-09-02 Hitachi Ltd Multilink type data branching and inserting device
JPS5941941A (en) * 1982-09-01 1984-03-08 Hitachi Ltd Signal transmitting circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0587498U (en) * 1991-06-13 1993-11-26 品川白煉瓦株式会社 Baking table for roof tile firing

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50157008A (en) * 1974-06-07 1975-12-18
JPS51105214A (en) * 1975-03-13 1976-09-17 Fuji Electric Co Ltd Johodensono jutaishorihoshiki

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50157008A (en) * 1974-06-07 1975-12-18
JPS51105214A (en) * 1975-03-13 1976-09-17 Fuji Electric Co Ltd Johodensono jutaishorihoshiki

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57142056A (en) * 1981-02-27 1982-09-02 Hitachi Ltd Multilink type data branching and inserting device
JPS5941941A (en) * 1982-09-01 1984-03-08 Hitachi Ltd Signal transmitting circuit
JPH0245860B2 (en) * 1982-09-01 1990-10-12 Hitachi Ltd

Also Published As

Publication number Publication date
JPS5846099B2 (en) 1983-10-14

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