JPS5587394A - Control system for memory device - Google Patents
Control system for memory deviceInfo
- Publication number
- JPS5587394A JPS5587394A JP15900978A JP15900978A JPS5587394A JP S5587394 A JPS5587394 A JP S5587394A JP 15900978 A JP15900978 A JP 15900978A JP 15900978 A JP15900978 A JP 15900978A JP S5587394 A JPS5587394 A JP S5587394A
- Authority
- JP
- Japan
- Prior art keywords
- region
- word
- bit width
- amount equivalent
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE: To increase the using efficiency for the memory capacity as a whole by increasing the bit width more than other information for the amount equivalent to one word only at the position where the information featuring the large bit width is stored.
CONSTITUTION: The region of the bit width featuring the necessary minimum amount over the entire word A is defined as memory region 1, and the region which stores the extra bits concerning the amount equivalent to word (a) is defined as memory region 2 each. Then only the amount equivalent to word (a) is provided at region 2, and region 1 is used for other A-a words. And the position storing word (a) is varied freely according to the program. Thus the information indicating the address storing word (a) of the large bit width in region 1 is set at large-bit width data address/address converter part 6.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15900978A JPS5587394A (en) | 1978-12-22 | 1978-12-22 | Control system for memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15900978A JPS5587394A (en) | 1978-12-22 | 1978-12-22 | Control system for memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5587394A true JPS5587394A (en) | 1980-07-02 |
Family
ID=15684242
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15900978A Pending JPS5587394A (en) | 1978-12-22 | 1978-12-22 | Control system for memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5587394A (en) |
-
1978
- 1978-12-22 JP JP15900978A patent/JPS5587394A/en active Pending
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