JPS5586121A - Semiconductor surface treatment - Google Patents

Semiconductor surface treatment

Info

Publication number
JPS5586121A
JPS5586121A JP15853778A JP15853778A JPS5586121A JP S5586121 A JPS5586121 A JP S5586121A JP 15853778 A JP15853778 A JP 15853778A JP 15853778 A JP15853778 A JP 15853778A JP S5586121 A JPS5586121 A JP S5586121A
Authority
JP
Japan
Prior art keywords
film
sio
captured
corona discharge
electron
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15853778A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP15853778A priority Critical patent/JPS5586121A/en
Publication of JPS5586121A publication Critical patent/JPS5586121A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce charge capture density to dielectric film by cleaning the dielectric film on the surface of a semiconductor.
CONSTITUTION: When negative or positive corona is charged on the surface of an SiO2 film on an Si substrate, hole or electron is captured from the Si substrate into the SiO2 film. After moving Al+, Fe+, etc. into the SiO2 film in high field by corona charge according to this method, a capture density by Al+, Fe+, etc. in the film can be eliminated almost completely through removing the film surface including them. To be free from an influence of a potential of the negative corona, the negative corona discharge is charged on the SiO2 film surface full in SiO2 withstand voltage, which is then neutralized by washing or positive corona discharge, the electron is captured to the surface by charging the positive corona discharge full in withstand voltage, and the captured layer is etched. The electron is not captured then even from corona discharge, and Al, Fe, etc. can be removed thoroughly. An element characteristic can thus be improved.
COPYRIGHT: (C)1980,JPO&Japio
JP15853778A 1978-12-25 1978-12-25 Semiconductor surface treatment Pending JPS5586121A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15853778A JPS5586121A (en) 1978-12-25 1978-12-25 Semiconductor surface treatment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15853778A JPS5586121A (en) 1978-12-25 1978-12-25 Semiconductor surface treatment

Publications (1)

Publication Number Publication Date
JPS5586121A true JPS5586121A (en) 1980-06-28

Family

ID=15673873

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15853778A Pending JPS5586121A (en) 1978-12-25 1978-12-25 Semiconductor surface treatment

Country Status (1)

Country Link
JP (1) JPS5586121A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5635410A (en) * 1994-07-25 1997-06-03 Dainippon Screen Manufacturing Co., Ltd. Bias temperature treatment method
JP2016178131A (en) * 2015-03-18 2016-10-06 株式会社東芝 Semiconductor device and manufacturing method of the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5635410A (en) * 1994-07-25 1997-06-03 Dainippon Screen Manufacturing Co., Ltd. Bias temperature treatment method
JP2016178131A (en) * 2015-03-18 2016-10-06 株式会社東芝 Semiconductor device and manufacturing method of the same

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