JPS5583933A - Memory control system for character display unit - Google Patents

Memory control system for character display unit

Info

Publication number
JPS5583933A
JPS5583933A JP15804478A JP15804478A JPS5583933A JP S5583933 A JPS5583933 A JP S5583933A JP 15804478 A JP15804478 A JP 15804478A JP 15804478 A JP15804478 A JP 15804478A JP S5583933 A JPS5583933 A JP S5583933A
Authority
JP
Japan
Prior art keywords
display
character
memory
display unit
display character
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15804478A
Other languages
Japanese (ja)
Other versions
JPS6138473B2 (en
Inventor
Ryoichi Ishimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15804478A priority Critical patent/JPS5583933A/en
Publication of JPS5583933A publication Critical patent/JPS5583933A/en
Publication of JPS6138473B2 publication Critical patent/JPS6138473B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To ensure the immediate response to the needs with reduction of both the number of component parts and the cost and without fixing the character pattern by using a unified memory for both the display memory and the display character generator.
CONSTITUTION: Reference oscillator 8, which oscillates with the frequency which is determined by the horizontal scanning time of character display unit 7 plus the display character number and the picture element decomposition number, delivers the pulse obtained by dividing the reference clock down to 1/n. These pulses are counted through display character counter part 12 comprising counters 9, 10 and 11 each. Thus horizontal and vertical synchronous signals 13 and 14 of unit 7 are generated. The cursor address showing the position to write or read the character code into/out CPU2 is stored into display character address register 15 and then written into display refresh memory 3 within large-capacity memory 5 via signal line 17.
COPYRIGHT: (C)1980,JPO&Japio
JP15804478A 1978-12-20 1978-12-20 Memory control system for character display unit Granted JPS5583933A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15804478A JPS5583933A (en) 1978-12-20 1978-12-20 Memory control system for character display unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15804478A JPS5583933A (en) 1978-12-20 1978-12-20 Memory control system for character display unit

Publications (2)

Publication Number Publication Date
JPS5583933A true JPS5583933A (en) 1980-06-24
JPS6138473B2 JPS6138473B2 (en) 1986-08-29

Family

ID=15663056

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15804478A Granted JPS5583933A (en) 1978-12-20 1978-12-20 Memory control system for character display unit

Country Status (1)

Country Link
JP (1) JPS5583933A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59214079A (en) * 1983-04-25 1984-12-03 スペリ−・コ−ポレ−シヨン Video display control circuit
JPS61282924A (en) * 1985-06-07 1986-12-13 Alps Electric Co Ltd Information controller
JPH04234086A (en) * 1990-07-23 1992-08-21 Bull Sa Data input/output device for information display and using method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59214079A (en) * 1983-04-25 1984-12-03 スペリ−・コ−ポレ−シヨン Video display control circuit
JPS61282924A (en) * 1985-06-07 1986-12-13 Alps Electric Co Ltd Information controller
JPH04234086A (en) * 1990-07-23 1992-08-21 Bull Sa Data input/output device for information display and using method thereof

Also Published As

Publication number Publication date
JPS6138473B2 (en) 1986-08-29

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