JPS5580915A - Reception identifier circuit - Google Patents
Reception identifier circuitInfo
- Publication number
- JPS5580915A JPS5580915A JP15550878A JP15550878A JPS5580915A JP S5580915 A JPS5580915 A JP S5580915A JP 15550878 A JP15550878 A JP 15550878A JP 15550878 A JP15550878 A JP 15550878A JP S5580915 A JPS5580915 A JP S5580915A
- Authority
- JP
- Japan
- Prior art keywords
- vin
- vout
- signal
- point
- steady
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manipulation Of Pulses (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE: To secure the steady reception identification to the environmental conditions such as the power voltage, the ambient temperature and the like.
CONSTITUTION: When no output is given from signal source 1 like the current source, no signal current flows through converter circuit network 2. Thus voltage VP at point P is equal to VIN+ of the +IN terminal at amplifier circuit 3, and no current flows to negative feedback circuits 4-1 and 4-2 under the conditions of VIN+=VIN- and VP=VIN-. And thus VP=VIN-=VOUT+ is obtained to secure the co incidence for the DC levels of two output of circuit 3. After this, when the signal of VS is obtained from signal source 1, the peak of VOUT- emerges for VP. And the DC level becomes as shown by the broken lines, and at the same time, the steady point of VP fixed at B. And the time variation of VOUT+ and VOUT- cross at the half point of signal amplitude VS. Thus with application of these two signals to comparator circuit 6, the extremely steady identification is secured with the half of the signal amplitude.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15550878A JPS5580915A (en) | 1978-12-14 | 1978-12-14 | Reception identifier circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15550878A JPS5580915A (en) | 1978-12-14 | 1978-12-14 | Reception identifier circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5580915A true JPS5580915A (en) | 1980-06-18 |
Family
ID=15607573
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15550878A Pending JPS5580915A (en) | 1978-12-14 | 1978-12-14 | Reception identifier circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5580915A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5090829A (en) * | 1991-01-17 | 1992-02-25 | Ncr Corporation | Method and apparatus for monitoring print head carriage |
-
1978
- 1978-12-14 JP JP15550878A patent/JPS5580915A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5090829A (en) * | 1991-01-17 | 1992-02-25 | Ncr Corporation | Method and apparatus for monitoring print head carriage |
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