JPS5576467A - Decentralized processor - Google Patents

Decentralized processor

Info

Publication number
JPS5576467A
JPS5576467A JP15088278A JP15088278A JPS5576467A JP S5576467 A JPS5576467 A JP S5576467A JP 15088278 A JP15088278 A JP 15088278A JP 15088278 A JP15088278 A JP 15088278A JP S5576467 A JPS5576467 A JP S5576467A
Authority
JP
Japan
Prior art keywords
processors
processor
task
plus
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15088278A
Other languages
Japanese (ja)
Inventor
Jun Takeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15088278A priority Critical patent/JPS5576467A/en
Publication of JPS5576467A publication Critical patent/JPS5576467A/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Abstract

PURPOSE: To omit the idle monitor function and the task allotment function to the task processor of the pre-processor by transferring the task frame to the pre-processor and the task processor connected in a loop-shape in the decentralized processor, thus realizing the miniaturization of the processors.
CONSTITUTION: Connection units 211W214 are connected between pre-processors 201W203 of the decentralized processor, and the 1st loop is formed with processors 201W203 plus 211W214. At the same time, connection units 221W224 are connected between task processors 204W207, and the 2nd loop is formed with processors 204W207 plus 221W224. Then the connection is given among processors 211 and 221W214 plus 224. Thus the job arrived at processors 201W203 is allotted into the proper process unit tasks, and the task frames with each address given are delivered to the 1st group and then transferred to the 2nd group via processors 211W214 plus 221W224. In such way, the miniaturization is realized for the decentralized processor.
COPYRIGHT: (C)1980,JPO&Japio
JP15088278A 1978-12-05 1978-12-05 Decentralized processor Pending JPS5576467A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15088278A JPS5576467A (en) 1978-12-05 1978-12-05 Decentralized processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15088278A JPS5576467A (en) 1978-12-05 1978-12-05 Decentralized processor

Publications (1)

Publication Number Publication Date
JPS5576467A true JPS5576467A (en) 1980-06-09

Family

ID=15506436

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15088278A Pending JPS5576467A (en) 1978-12-05 1978-12-05 Decentralized processor

Country Status (1)

Country Link
JP (1) JPS5576467A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131062A (en) * 1984-10-30 1986-06-18 Mitsubishi Electric Corp Multiprocessor system
JP2016134130A (en) * 2015-01-22 2016-07-25 三菱電機株式会社 Multi-ring network

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131062A (en) * 1984-10-30 1986-06-18 Mitsubishi Electric Corp Multiprocessor system
JP2016134130A (en) * 2015-01-22 2016-07-25 三菱電機株式会社 Multi-ring network

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