JPS5567666A - Surge simulator for generator - Google Patents

Surge simulator for generator

Info

Publication number
JPS5567666A
JPS5567666A JP14146578A JP14146578A JPS5567666A JP S5567666 A JPS5567666 A JP S5567666A JP 14146578 A JP14146578 A JP 14146578A JP 14146578 A JP14146578 A JP 14146578A JP S5567666 A JPS5567666 A JP S5567666A
Authority
JP
Japan
Prior art keywords
voltage
produced
open
peak voltage
waveform
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14146578A
Other languages
Japanese (ja)
Inventor
Masahiro Yasue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Komatsu Ltd
Original Assignee
Komatsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Komatsu Ltd filed Critical Komatsu Ltd
Priority to JP14146578A priority Critical patent/JPS5567666A/en
Publication of JPS5567666A publication Critical patent/JPS5567666A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable to generate the simulation waveform close to actual surge voltage, by producing the discharge waveform with the peak voltage produced first.
CONSTITUTION: The switches SW1, SW2 are both closed when the load is connected, and the voltage exerted to the sample 1 is held at the second voltage. The switch SW2 is open after the capacitor C1 is discharged. When the load is open, i.e., the switch SW1 is open, the peak voltage is produced with the coil L. The maximum value of the peak voltage is a value regulated with the Zener diode ZD. After the peak voltage is produced and delayed by about 1 msec, pulses are produced from the trigger circuit 4 and the thyristor SCR is triggered. The capacitor C1 is discharged and the discharge voltage waveform is fed to the sample 1 via the resistor R1 and diode D3.
COPYRIGHT: (C)1980,JPO&Japio
JP14146578A 1978-11-16 1978-11-16 Surge simulator for generator Pending JPS5567666A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14146578A JPS5567666A (en) 1978-11-16 1978-11-16 Surge simulator for generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14146578A JPS5567666A (en) 1978-11-16 1978-11-16 Surge simulator for generator

Publications (1)

Publication Number Publication Date
JPS5567666A true JPS5567666A (en) 1980-05-21

Family

ID=15292507

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14146578A Pending JPS5567666A (en) 1978-11-16 1978-11-16 Surge simulator for generator

Country Status (1)

Country Link
JP (1) JPS5567666A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021510830A (en) * 2018-03-13 2021-04-30 オリンパス・ウィンター・アンド・イベ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング Test equipment for electrosurgery generators

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021510830A (en) * 2018-03-13 2021-04-30 オリンパス・ウィンター・アンド・イベ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング Test equipment for electrosurgery generators

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