JPS5564695A - Memory diagnostic system - Google Patents

Memory diagnostic system

Info

Publication number
JPS5564695A
JPS5564695A JP13728978A JP13728978A JPS5564695A JP S5564695 A JPS5564695 A JP S5564695A JP 13728978 A JP13728978 A JP 13728978A JP 13728978 A JP13728978 A JP 13728978A JP S5564695 A JPS5564695 A JP S5564695A
Authority
JP
Japan
Prior art keywords
memory
address
output
packaged
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13728978A
Other languages
Japanese (ja)
Other versions
JPS6131901B2 (en
Inventor
Yasuhiro Nagayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13728978A priority Critical patent/JPS5564695A/en
Publication of JPS5564695A publication Critical patent/JPS5564695A/en
Publication of JPS6131901B2 publication Critical patent/JPS6131901B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To make a decision on faulty qualities of a memory and memory driver circuit by forming address information as a memory output when access to an address space where no memory is packaged is attained in a diagnostic mode for the memory unit.
CONSTITUTION: When memory driver circuit 1 commands a diagnosis by diagnostic command signal 11, attaining access to an address where no memory is packaged make address detection signal 13 of address detection circuit 4 change into [1] to instruct address selector circuit 3 to output address information, thereby outputting data to output 14. Therefore, access to address areas (a) and (c) with packaged memory is attained normally and the contents of memory 2 appear at output 14. In case of access to address area (b) with no packaged memory, address information is led out. Consequently, when different address information is outputted from output 14, a decision on the fault of circuit 1 is made to discriminate a fault memory element.
COPYRIGHT: (C)1980,JPO&Japio
JP13728978A 1978-11-09 1978-11-09 Memory diagnostic system Granted JPS5564695A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13728978A JPS5564695A (en) 1978-11-09 1978-11-09 Memory diagnostic system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13728978A JPS5564695A (en) 1978-11-09 1978-11-09 Memory diagnostic system

Publications (2)

Publication Number Publication Date
JPS5564695A true JPS5564695A (en) 1980-05-15
JPS6131901B2 JPS6131901B2 (en) 1986-07-23

Family

ID=15195194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13728978A Granted JPS5564695A (en) 1978-11-09 1978-11-09 Memory diagnostic system

Country Status (1)

Country Link
JP (1) JPS5564695A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01251390A (en) * 1988-03-30 1989-10-06 Matsushita Electric Ind Co Ltd Storage device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01251390A (en) * 1988-03-30 1989-10-06 Matsushita Electric Ind Co Ltd Storage device

Also Published As

Publication number Publication date
JPS6131901B2 (en) 1986-07-23

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