JPS5555664A - Frequency detector for analog facsimile - Google Patents

Frequency detector for analog facsimile

Info

Publication number
JPS5555664A
JPS5555664A JP12789478A JP12789478A JPS5555664A JP S5555664 A JPS5555664 A JP S5555664A JP 12789478 A JP12789478 A JP 12789478A JP 12789478 A JP12789478 A JP 12789478A JP S5555664 A JPS5555664 A JP S5555664A
Authority
JP
Japan
Prior art keywords
signal
circuit
pulse
synchronizing
given
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12789478A
Other languages
Japanese (ja)
Other versions
JPS6031381B2 (en
Inventor
Fusakichi Okochi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP53127894A priority Critical patent/JPS6031381B2/en
Publication of JPS5555664A publication Critical patent/JPS5555664A/en
Publication of JPS6031381B2 publication Critical patent/JPS6031381B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Facsimile Transmission Control (AREA)

Abstract

PURPOSE: To enable digital processing, by picking up the sum of binary signal of input signal and the reference binary signal in synchronizing with a given phase point, and discriminating whether it is a given procedure signal or not through the count of the number of times.
CONSTITUTION: The input signal converted into binary signal ai is inputted to the code converter 1 and the gate circuit 2. The modulator 1 performs code conversion for it, and the signal Ai is outputted to the addition circuit 5. On the other hand, the gate circuit 2 outputs the operation start signal S in synchronizing with the rising phase of the signal ai. The frequency division circuit 3 divides the clock pulse CP based on the frequency dividing data D to produce the reference binary signal bi. The code converter 4 performs code conversion for the signal bi into the signal Bi. In this case, the circuit 3 produces the sampling pulse SP in synchronizing with a given phase point, and the circuit 5 performs the addition of the signals Ai and Bi every input of the pulse SP. The circuit 5 outputs pulse to the counter 6 when the result of addition is 10 and to the counter 7 when 00. Further, if the count values c1 and c2 are more than given values, they are discriminated as procedure signal.
COPYRIGHT: (C)1980,JPO&Japio
JP53127894A 1978-10-19 1978-10-19 Analog facsimile frequency detection device Expired JPS6031381B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53127894A JPS6031381B2 (en) 1978-10-19 1978-10-19 Analog facsimile frequency detection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53127894A JPS6031381B2 (en) 1978-10-19 1978-10-19 Analog facsimile frequency detection device

Publications (2)

Publication Number Publication Date
JPS5555664A true JPS5555664A (en) 1980-04-23
JPS6031381B2 JPS6031381B2 (en) 1985-07-22

Family

ID=14971281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53127894A Expired JPS6031381B2 (en) 1978-10-19 1978-10-19 Analog facsimile frequency detection device

Country Status (1)

Country Link
JP (1) JPS6031381B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60194650A (en) * 1984-03-15 1985-10-03 Ricoh Co Ltd Frequency signal discriminating circuit of communication system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4956523A (en) * 1973-05-15 1974-06-01

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4956523A (en) * 1973-05-15 1974-06-01

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60194650A (en) * 1984-03-15 1985-10-03 Ricoh Co Ltd Frequency signal discriminating circuit of communication system
JPH0531862B2 (en) * 1984-03-15 1993-05-13 Ricoh Kk

Also Published As

Publication number Publication date
JPS6031381B2 (en) 1985-07-22

Similar Documents

Publication Publication Date Title
JPS5441061A (en) Analogue/digital converter
TW341009B (en) Interpolating digital to analog converter architecture for improved spurious signal suppression
JPS5530778A (en) Digital input unit
JPS5555664A (en) Frequency detector for analog facsimile
JPS54964A (en) Analog digital converter
JPS55120242A (en) Waveform synthesizer
JPS5591233A (en) Successive comparison type a/d converter
JPS556958A (en) Sampling frequency converter
JPS5291638A (en) D/a converter
JPS5289055A (en) Converter for signal
JPS53147454A (en) Code conversion system
JPS558144A (en) Analog-digital conversion circuit
JPS567521A (en) Ad conversion system
JPS54133058A (en) Signal converter
JPS5591079A (en) A/d converter
JPS5597731A (en) Analog-digital converter
JPS5416162A (en) Analog-to digital converter
JPS5440550A (en) Analog-to-digital converter
JPS5533204A (en) Digital control system
JPS5798040A (en) Comparator for serial magnitude
JPS5278356A (en) Parallel a/d converter
JPS5530232A (en) Demodulator on n-phase phase shift keying system
JPS54140522A (en) Digital data signal converting circuit
JPS5313081A (en) Comparator
JPS5698795A (en) High-speed sample holding and comparing circuit