JPS5551273B2 - - Google Patents
Info
- Publication number
- JPS5551273B2 JPS5551273B2 JP15777676A JP15777676A JPS5551273B2 JP S5551273 B2 JPS5551273 B2 JP S5551273B2 JP 15777676 A JP15777676 A JP 15777676A JP 15777676 A JP15777676 A JP 15777676A JP S5551273 B2 JPS5551273 B2 JP S5551273B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15777676A JPS5381021A (en) | 1976-12-27 | 1976-12-27 | Address input circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15777676A JPS5381021A (en) | 1976-12-27 | 1976-12-27 | Address input circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5381021A JPS5381021A (en) | 1978-07-18 |
| JPS5551273B2 true JPS5551273B2 (cs) | 1980-12-23 |
Family
ID=15657034
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15777676A Granted JPS5381021A (en) | 1976-12-27 | 1976-12-27 | Address input circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5381021A (cs) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5954096A (ja) * | 1982-09-22 | 1984-03-28 | Hitachi Ltd | ダイナミツク型ｍｏｓｒａｍ |
| JPS60167195A (ja) * | 1985-01-11 | 1985-08-30 | Hitachi Ltd | メモリ回路 |
| JPS6241438Y2 (cs) * | 1986-07-14 | 1987-10-23 | ||
| JPS63247990A (ja) * | 1987-10-21 | 1988-10-14 | Hitachi Ltd | 半導体装置 |
| WO1992009084A1 (en) * | 1990-11-16 | 1992-05-29 | Fujitsu Limited | Semiconductor memory having high-speed address decoder |
| JPH0935471A (ja) * | 1995-07-21 | 1997-02-07 | Nec Shizuoka Ltd | メモリ素子 |
| US5721708A (en) * | 1996-07-15 | 1998-02-24 | Winbond Electronics Corp. | Reduction of the address pins of the integrated circuit |
| KR19990018181A (ko) * | 1997-08-26 | 1999-03-15 | 윤종용 | 복합 반도체 장치의 어드레스 선택 방법 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3969706A (en) * | 1974-10-08 | 1976-07-13 | Mostek Corporation | Dynamic random access memory misfet integrated circuit |
-
1976
- 1976-12-27 JP JP15777676A patent/JPS5381021A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5381021A (en) | 1978-07-18 |