JPS5542418A - Vertical deflecting circuit for high-quality picture television receiver - Google Patents

Vertical deflecting circuit for high-quality picture television receiver

Info

Publication number
JPS5542418A
JPS5542418A JP11469678A JP11469678A JPS5542418A JP S5542418 A JPS5542418 A JP S5542418A JP 11469678 A JP11469678 A JP 11469678A JP 11469678 A JP11469678 A JP 11469678A JP S5542418 A JPS5542418 A JP S5542418A
Authority
JP
Japan
Prior art keywords
voltage
saw
tooth wave
vertical
pulse voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11469678A
Other languages
Japanese (ja)
Other versions
JPS6235309B2 (en
Inventor
Fumio Inoue
Nobuyuki Suzuki
Kunio Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11469678A priority Critical patent/JPS5542418A/en
Publication of JPS5542418A publication Critical patent/JPS5542418A/en
Publication of JPS6235309B2 publication Critical patent/JPS6235309B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To always ensure a high-quality interlaced scanning by piling the 1H- based pulse voltage synchronized with the horizontal synchronous signal in the reception signals onto the ordinary vertical deflecting saw-tooth wave voltage. CONSTITUTION:The vertical synchronous signal of terminal 14 is converted into the saw-tooth wave voltage through saw-tooth wave generator 15. Then the initial adjustment is given to the vertical screen amplitude via level adjuster 16, and the saw-tooth wave voltage is applied to adder 18 via amplifier 17. On the other hand, the initial adjustment is given to the 1H-based pulse voltage of terminal 19 to secure a perfect interlaced scanning via level adjuster 20, and then the pulse voltage is applied to adder 18. The added saw-tooth wave voltage and the pulse voltage are applied to vertical deflecting yoke 13 via amplifier 21 to give deflection to the electron beam. At the same time, the voltage proportional to the current flowing to yoke 13 is detected through feedback resistance 22, and the detection voltage is integrated 23 to be fed back to amplifier 17. As a result, the slope of the vertical deflection current of the horizontal scanning period can be kept at 1/2 of that before scanning conversion, thus securing a high-quality interlaced scanning.
JP11469678A 1978-09-20 1978-09-20 Vertical deflecting circuit for high-quality picture television receiver Granted JPS5542418A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11469678A JPS5542418A (en) 1978-09-20 1978-09-20 Vertical deflecting circuit for high-quality picture television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11469678A JPS5542418A (en) 1978-09-20 1978-09-20 Vertical deflecting circuit for high-quality picture television receiver

Publications (2)

Publication Number Publication Date
JPS5542418A true JPS5542418A (en) 1980-03-25
JPS6235309B2 JPS6235309B2 (en) 1987-07-31

Family

ID=14644333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11469678A Granted JPS5542418A (en) 1978-09-20 1978-09-20 Vertical deflecting circuit for high-quality picture television receiver

Country Status (1)

Country Link
JP (1) JPS5542418A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01302214A (en) * 1988-05-30 1989-12-06 Sumitomo Electric Ind Ltd Chip carrier

Also Published As

Publication number Publication date
JPS6235309B2 (en) 1987-07-31

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