JPS54148423A - Television receiver - Google Patents

Television receiver

Info

Publication number
JPS54148423A
JPS54148423A JP5669278A JP5669278A JPS54148423A JP S54148423 A JPS54148423 A JP S54148423A JP 5669278 A JP5669278 A JP 5669278A JP 5669278 A JP5669278 A JP 5669278A JP S54148423 A JPS54148423 A JP S54148423A
Authority
JP
Japan
Prior art keywords
circuit
vertical
deflecting
rectangular wave
wave type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5669278A
Other languages
Japanese (ja)
Inventor
Masanori Hagino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5669278A priority Critical patent/JPS54148423A/en
Publication of JPS54148423A publication Critical patent/JPS54148423A/en
Pending legal-status Critical Current

Links

Landscapes

  • Details Of Television Scanning (AREA)

Abstract

PURPOSE:To lessen the deterioration of the picture quality as well as the occurrence of the moire by piling the rectangular wave type current which reverses every 1H- period onto the vertical deflecting current and then shifting the amplitude of the piled rectangular wave type current on the screen by + or -1/4 times as much as the scanning line space. CONSTITUTION:Synchronous isolator circuit 1 extracts the horizontal and vertical synchronous signals from the received composite video signals, supplies the horizontal synchronous signal to horizontal deflecting circuit 2, and sends the output of circuit 2 to horizontal deflecting yoke. On the other hand, vertical synchronus signal is supplied to vertical deflecting circuit 3, and the output is connected to vertical deflecting yoke to give the vertical scanning to the electron beam of picture tube 6. Here, the output of the circuit is amplified 5 via FF4 and then supplied to circuit 3, and the rectangular wave type current reversing every 1H-period is piled on the vertical deflecting current. This piled rectangular wave type current amplitude is set so that it may shift on the screen by + or -1/4 times as much as the scanning line space. As a result, the deterioration of the picture quality can be lessened with the reduced occurrence of the moire.
JP5669278A 1978-05-15 1978-05-15 Television receiver Pending JPS54148423A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5669278A JPS54148423A (en) 1978-05-15 1978-05-15 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5669278A JPS54148423A (en) 1978-05-15 1978-05-15 Television receiver

Publications (1)

Publication Number Publication Date
JPS54148423A true JPS54148423A (en) 1979-11-20

Family

ID=13034492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5669278A Pending JPS54148423A (en) 1978-05-15 1978-05-15 Television receiver

Country Status (1)

Country Link
JP (1) JPS54148423A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05236290A (en) * 1992-02-25 1993-09-10 Matsushita Electric Ind Co Ltd Moire cancel circuit
JPH05236291A (en) * 1992-02-25 1993-09-10 Matsushita Electric Ind Co Ltd Moire cancel circuit
US5430502A (en) * 1992-02-25 1995-07-04 Matsushita Electric Industrial Co., Ltd. Apparatus for eliminating moire pattern effects resulting from the use of different display resolution with a fixed size shadow mask
US5440353A (en) * 1992-02-25 1995-08-08 Matsushita Electric Industrial Co., Ltd. Display monitor including moire cancellation circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05236290A (en) * 1992-02-25 1993-09-10 Matsushita Electric Ind Co Ltd Moire cancel circuit
JPH05236291A (en) * 1992-02-25 1993-09-10 Matsushita Electric Ind Co Ltd Moire cancel circuit
US5430502A (en) * 1992-02-25 1995-07-04 Matsushita Electric Industrial Co., Ltd. Apparatus for eliminating moire pattern effects resulting from the use of different display resolution with a fixed size shadow mask
US5440353A (en) * 1992-02-25 1995-08-08 Matsushita Electric Industrial Co., Ltd. Display monitor including moire cancellation circuit

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