JPS5538714A - Data transmission system - Google Patents
Data transmission systemInfo
- Publication number
- JPS5538714A JPS5538714A JP11070178A JP11070178A JPS5538714A JP S5538714 A JPS5538714 A JP S5538714A JP 11070178 A JP11070178 A JP 11070178A JP 11070178 A JP11070178 A JP 11070178A JP S5538714 A JPS5538714 A JP S5538714A
- Authority
- JP
- Japan
- Prior art keywords
- data
- pulse
- circuit
- generation circuit
- timing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/45—Transmitting circuits; Receiving circuits using electronic distributors
Abstract
PURPOSE:To omit the crystal oscillator for generation of the timing signal by securing identification between 0 and 1 of the binary code based on the pulse duration and thus ensuring generation of the pulses every bit for any data, thus realizing a simple and accurate data transmission. CONSTITUTION:When the parallel data of 8 bits is loaded to shift register (SR)10, timing generation circuit 11 is started by the trigger signal of a to deliver the shift clock and then to draw out the data from SR10 by one bit. And 0-pulse generation circuit 13 and 1-pulse generation circuit 14 are selected based on the data, and then the pulse is generated in response to clock b sent from circuit 11 to obtain the output signal of d from OR circuit 15. The pulse is set to, for example, the short and long when the serial data c features 0 and 1 respectively. Also circuit 11 is reset when counter 12 counts a fixed amount such as 8. At the reception side, the timing pulse generation circuit is actuated by the input of the data, and the data is read into SR to convert the transmission data into the parallel data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11070178A JPS5538714A (en) | 1978-09-11 | 1978-09-11 | Data transmission system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11070178A JPS5538714A (en) | 1978-09-11 | 1978-09-11 | Data transmission system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5538714A true JPS5538714A (en) | 1980-03-18 |
Family
ID=14542254
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11070178A Pending JPS5538714A (en) | 1978-09-11 | 1978-09-11 | Data transmission system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5538714A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01143435A (en) * | 1987-11-30 | 1989-06-06 | Nec Corp | Data transmission equipment |
| JPH0637743A (en) * | 1992-04-22 | 1994-02-10 | Sony Tektronix Corp | Serial data receiver |
-
1978
- 1978-09-11 JP JP11070178A patent/JPS5538714A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01143435A (en) * | 1987-11-30 | 1989-06-06 | Nec Corp | Data transmission equipment |
| JPH0637743A (en) * | 1992-04-22 | 1994-02-10 | Sony Tektronix Corp | Serial data receiver |
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