JPS5532230A - Memory unit - Google Patents

Memory unit

Info

Publication number
JPS5532230A
JPS5532230A JP10364478A JP10364478A JPS5532230A JP S5532230 A JPS5532230 A JP S5532230A JP 10364478 A JP10364478 A JP 10364478A JP 10364478 A JP10364478 A JP 10364478A JP S5532230 A JPS5532230 A JP S5532230A
Authority
JP
Japan
Prior art keywords
error
address
bit
bit error
intermittent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10364478A
Other languages
Japanese (ja)
Inventor
Shuichi Hanatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10364478A priority Critical patent/JPS5532230A/en
Publication of JPS5532230A publication Critical patent/JPS5532230A/en
Pending legal-status Critical Current

Links

Landscapes

  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: To remove an intermittent error of two-bit error data by making a reread by making use of the two-bit error detecting function of an error detecting correction circuit.
CONSTITUTION: When error detecting correction circuit 3 detects a two-bit error on signal line 102, an address corresponding to this two-bit error data is selected by address selector circuit 6 under the control of signal line 103 since this address is stored in address stand-by register 5, thereby realizing a reread from memory circuit 1. In this way, at most one bit of the two-bit error of data read out firstly is removed and when the other is caused by an intermittent read error, this intermittent error can be removed by rereading.
COPYRIGHT: (C)1980,JPO&Japio
JP10364478A 1978-08-25 1978-08-25 Memory unit Pending JPS5532230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10364478A JPS5532230A (en) 1978-08-25 1978-08-25 Memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10364478A JPS5532230A (en) 1978-08-25 1978-08-25 Memory unit

Publications (1)

Publication Number Publication Date
JPS5532230A true JPS5532230A (en) 1980-03-06

Family

ID=14359472

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10364478A Pending JPS5532230A (en) 1978-08-25 1978-08-25 Memory unit

Country Status (1)

Country Link
JP (1) JPS5532230A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733498A (en) * 1980-08-07 1982-02-23 Hitachi Ltd Control system of main storage

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733498A (en) * 1980-08-07 1982-02-23 Hitachi Ltd Control system of main storage

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