JPS5532188A - Reconstruction controller of memory module - Google Patents
Reconstruction controller of memory moduleInfo
- Publication number
- JPS5532188A JPS5532188A JP10584478A JP10584478A JPS5532188A JP S5532188 A JPS5532188 A JP S5532188A JP 10584478 A JP10584478 A JP 10584478A JP 10584478 A JP10584478 A JP 10584478A JP S5532188 A JPS5532188 A JP S5532188A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- address
- module
- block
- memory module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10584478A JPS5532188A (en) | 1978-08-29 | 1978-08-29 | Reconstruction controller of memory module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10584478A JPS5532188A (en) | 1978-08-29 | 1978-08-29 | Reconstruction controller of memory module |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5532188A true JPS5532188A (en) | 1980-03-06 |
JPS6122332B2 JPS6122332B2 (ja) | 1986-05-31 |
Family
ID=14418317
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10584478A Granted JPS5532188A (en) | 1978-08-29 | 1978-08-29 | Reconstruction controller of memory module |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5532188A (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0442496A2 (en) * | 1990-02-15 | 1991-08-21 | Nec Corporation | Memory access control device having bank access checking circuits smaller in number than the memory modules |
US6170039B1 (en) | 1997-05-16 | 2001-01-02 | Nec Corporation | Memory controller for interchanging memory against memory error in interleave memory system |
US6401177B1 (en) | 1998-04-28 | 2002-06-04 | Nec Corporation | Memory system for restructuring a main memory unit in a general-purpose computer |
WO2007077595A1 (ja) * | 2005-12-28 | 2007-07-12 | Fujitsu Limited | メモリ制御方法、プログラム及び装置 |
-
1978
- 1978-08-29 JP JP10584478A patent/JPS5532188A/ja active Granted
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0442496A2 (en) * | 1990-02-15 | 1991-08-21 | Nec Corporation | Memory access control device having bank access checking circuits smaller in number than the memory modules |
US6170039B1 (en) | 1997-05-16 | 2001-01-02 | Nec Corporation | Memory controller for interchanging memory against memory error in interleave memory system |
US6401177B1 (en) | 1998-04-28 | 2002-06-04 | Nec Corporation | Memory system for restructuring a main memory unit in a general-purpose computer |
WO2007077595A1 (ja) * | 2005-12-28 | 2007-07-12 | Fujitsu Limited | メモリ制御方法、プログラム及び装置 |
JP4810542B2 (ja) * | 2005-12-28 | 2011-11-09 | 富士通株式会社 | メモリ制御方法、プログラム及び装置 |
US8219881B2 (en) | 2005-12-28 | 2012-07-10 | Fujitsu Limited | Memory controlling method, program and device |
Also Published As
Publication number | Publication date |
---|---|
JPS6122332B2 (ja) | 1986-05-31 |
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