JPS5531340A - Picture recording system - Google Patents

Picture recording system

Info

Publication number
JPS5531340A
JPS5531340A JP10461778A JP10461778A JPS5531340A JP S5531340 A JPS5531340 A JP S5531340A JP 10461778 A JP10461778 A JP 10461778A JP 10461778 A JP10461778 A JP 10461778A JP S5531340 A JPS5531340 A JP S5531340A
Authority
JP
Japan
Prior art keywords
memory
picture
line
contents
record
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10461778A
Other languages
Japanese (ja)
Inventor
Hiroshi Ochi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP10461778A priority Critical patent/JPS5531340A/en
Publication of JPS5531340A publication Critical patent/JPS5531340A/en
Pending legal-status Critical Current

Links

Landscapes

  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE: To obtain a record picture featuring a high gradation without lowering the resolution very much by memorizing the output of the line memory into the secondary picture signal memory with every line and then applying the picture signal voltage while giving the sequential switching to the contents of the signal memory to the plural elements of the multi-electrode.
CONSTITUTION: The output sent from line memory 22 is processed at process circuit 17 with every line to produce the secondary picture signals which are memorized in secondary picture signals memories 18a∼18d. To record the secondary picture element of the 1st line, memory 18a is selected via memory switching circuit 19. The contents of memory 18a is supplied to the scanning circuit, where the picture signal voltage is applied along with the sequential switching given to the contents of memory 18a to each element of multi-electrode 14 through signal distribution circuit 16. Then the recording paper is run toward arrow marking 21 and by the amount equivalent to the width of one secondary picture element to be then memorized in memory 18b. Thus the electrostatic picture of a high gradation is formed on the recording paper in accordace with the picture signals. Then the recording density is controlled every secondary picture element, thus obtaining a record picture featuring a high gradation without lowering the resolution very much.
COPYRIGHT: (C)1980,JPO&Japio
JP10461778A 1978-08-28 1978-08-28 Picture recording system Pending JPS5531340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10461778A JPS5531340A (en) 1978-08-28 1978-08-28 Picture recording system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10461778A JPS5531340A (en) 1978-08-28 1978-08-28 Picture recording system

Publications (1)

Publication Number Publication Date
JPS5531340A true JPS5531340A (en) 1980-03-05

Family

ID=14385394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10461778A Pending JPS5531340A (en) 1978-08-28 1978-08-28 Picture recording system

Country Status (1)

Country Link
JP (1) JPS5531340A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04110835U (en) * 1991-03-13 1992-09-25 理研軽金属工業株式会社 Kasagi

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5121722A (en) * 1974-08-16 1976-02-21 Matsushita Electric Ind Co Ltd
JPS51121211A (en) * 1975-04-17 1976-10-23 Oki Electric Ind Co Ltd A multiple gradation recording system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5121722A (en) * 1974-08-16 1976-02-21 Matsushita Electric Ind Co Ltd
JPS51121211A (en) * 1975-04-17 1976-10-23 Oki Electric Ind Co Ltd A multiple gradation recording system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04110835U (en) * 1991-03-13 1992-09-25 理研軽金属工業株式会社 Kasagi

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