JPS5524701B2 - - Google Patents

Info

Publication number
JPS5524701B2
JPS5524701B2 JP720675A JP720675A JPS5524701B2 JP S5524701 B2 JPS5524701 B2 JP S5524701B2 JP 720675 A JP720675 A JP 720675A JP 720675 A JP720675 A JP 720675A JP S5524701 B2 JPS5524701 B2 JP S5524701B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP720675A
Other languages
Japanese (ja)
Other versions
JPS50104872A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS50104872A publication Critical patent/JPS50104872A/ja
Publication of JPS5524701B2 publication Critical patent/JPS5524701B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
JP720675A 1974-01-17 1975-01-17 Expired JPS5524701B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/434,177 US3951693A (en) 1974-01-17 1974-01-17 Ion-implanted self-aligned transistor device including the fabrication method therefor

Publications (2)

Publication Number Publication Date
JPS50104872A JPS50104872A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1975-08-19
JPS5524701B2 true JPS5524701B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1980-07-01

Family

ID=23723126

Family Applications (1)

Application Number Title Priority Date Filing Date
JP720675A Expired JPS5524701B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1974-01-17 1975-01-17

Country Status (5)

Country Link
US (1) US3951693A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS5524701B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE2501074A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2258708A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB1474871A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61255888A (ja) * 1985-05-10 1986-11-13 Fuji Rubber Kk キ−トツプ耐摩耗印刷法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4131497A (en) * 1977-07-12 1978-12-26 International Business Machines Corporation Method of manufacturing self-aligned semiconductor devices
US4110126A (en) * 1977-08-31 1978-08-29 International Business Machines Corporation NPN/PNP Fabrication process with improved alignment
US4197630A (en) * 1978-08-25 1980-04-15 Rca Corporation Method of fabricating MNOS transistors having implanted channels
JPS561568A (en) * 1979-06-19 1981-01-09 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
GB2188479B (en) * 1986-03-26 1990-05-23 Stc Plc Semiconductor devices
JPH0515422U (ja) * 1991-08-07 1993-02-26 株式会社東海理化電機製作所 温度検出端子付バイポーラトランジスタ
US5932922A (en) * 1994-08-08 1999-08-03 Semicoa Semiconductors Uniform current density and high current gain bipolar transistor
JP4308294B2 (ja) * 2005-02-07 2009-08-05 出光興産株式会社 芳香族アミン誘導体及びそれを用いた有機エレクトロルミネッセンス素子

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3660735A (en) * 1969-09-10 1972-05-02 Sprague Electric Co Complementary metal insulator silicon transistor pairs
US3681153A (en) * 1970-01-05 1972-08-01 Motorola Inc Process for fabricating small geometry high frequency semiconductor device
NL173110C (nl) * 1971-03-17 1983-12-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.
DE2253001A1 (de) * 1971-10-29 1973-05-10 Motorola Inc Verfahren zur herstellung von halbleiteranordnungen
US3725150A (en) * 1971-10-29 1973-04-03 Motorola Inc Process for making a fine geometry, self-aligned device structure
US3771218A (en) * 1972-07-13 1973-11-13 Ibm Process for fabricating passivated transistors
US3793090A (en) * 1972-11-21 1974-02-19 Ibm Method for stabilizing fet devices having silicon gates and composite nitride-oxide gate dielectrics

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61255888A (ja) * 1985-05-10 1986-11-13 Fuji Rubber Kk キ−トツプ耐摩耗印刷法

Also Published As

Publication number Publication date
US3951693A (en) 1976-04-20
DE2501074A1 (de) 1975-07-31
FR2258708A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1975-08-18
JPS50104872A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1975-08-19
GB1474871A (en) 1977-05-25

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