JPS551763A - Transmission control system in on-line system - Google Patents
Transmission control system in on-line systemInfo
- Publication number
- JPS551763A JPS551763A JP7495278A JP7495278A JPS551763A JP S551763 A JPS551763 A JP S551763A JP 7495278 A JP7495278 A JP 7495278A JP 7495278 A JP7495278 A JP 7495278A JP S551763 A JPS551763 A JP S551763A
- Authority
- JP
- Japan
- Prior art keywords
- transmission
- unidirectional transmission
- answer
- reset
- choking
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
- H04L12/16—Arrangements for providing special services to substations
- H04L12/18—Arrangements for providing special services to substations for broadcast or conference, e.g. multicast
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer And Data Communications (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Communication Control (AREA)
Abstract
PURPOSE:To control the transmission so that the unidirectional transmission from the central unit to terminal can smoothly be made, by unconsciousness of the central unit for the processing state at the terminal, in the ON-line system treating inquiry and answer as the base. CONSTITUTION:The unidirectional transmission data(information outputted unidirectionally) is received at the special buffer 201 to tell it to the operator. FF206 is set with the instruction of unidirectional transmission, and is reset with the release instruction or the end of transmission to recognize various chocking states, and FF207 is set at the end of inquiry and answer and is reset with the instructions other than the end, to recorgnize the time point of the final instruction reception end of inquiry and answer. The logical sum between those outputs and the output of the buffer free detection circuit 219 is fed to the circuit 212 after inversion to inhibit the required input. The logical sum output 209 is inputted to the AND circuits 210, 211 to produce the unidirectional transmission permission, i.e., choking permission SNOD signal for transmission 205. The choking state of emergency or normal is released through the reset of FF206 with the choking release or unidirectional transmission end signal via the decoder 204.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7495278A JPS551763A (en) | 1978-06-21 | 1978-06-21 | Transmission control system in on-line system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7495278A JPS551763A (en) | 1978-06-21 | 1978-06-21 | Transmission control system in on-line system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS551763A true JPS551763A (en) | 1980-01-08 |
Family
ID=13562162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7495278A Pending JPS551763A (en) | 1978-06-21 | 1978-06-21 | Transmission control system in on-line system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS551763A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5870384A (en) * | 1981-09-24 | 1983-04-26 | Fujitsu Ltd | Serial printer controlling system |
JPH02192253A (en) * | 1989-01-20 | 1990-07-30 | Hitachi Ltd | Communication control processor |
-
1978
- 1978-06-21 JP JP7495278A patent/JPS551763A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5870384A (en) * | 1981-09-24 | 1983-04-26 | Fujitsu Ltd | Serial printer controlling system |
JPS6246012B2 (en) * | 1981-09-24 | 1987-09-30 | Fujitsu Ltd | |
JPH02192253A (en) * | 1989-01-20 | 1990-07-30 | Hitachi Ltd | Communication control processor |
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