JPS5659352A - Signal selective circuit - Google Patents

Signal selective circuit

Info

Publication number
JPS5659352A
JPS5659352A JP13417779A JP13417779A JPS5659352A JP S5659352 A JPS5659352 A JP S5659352A JP 13417779 A JP13417779 A JP 13417779A JP 13417779 A JP13417779 A JP 13417779A JP S5659352 A JPS5659352 A JP S5659352A
Authority
JP
Japan
Prior art keywords
circuit
signal
selective
input signal
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13417779A
Other languages
Japanese (ja)
Inventor
Takashi Morikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13417779A priority Critical patent/JPS5659352A/en
Publication of JPS5659352A publication Critical patent/JPS5659352A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To get rid of such an inconvenience as a specific input signal is not selected for many hours, by combining a precedence circuit and a signal selective circuit of the time slot system.
CONSTITUTION: The decoder 21 of a selective circuit 45 of the time slot system decodes the value of the counter 20, and provides the selective signals 30W33 having the intervals conforming with the processing speed of the input signals IN0W IN3, to the AND circuits 22W25. When this selective signal, for instance, 30 has been provided, if the input signal IN0 exists, the AND circuit 22 is opened, its output signal does not operate the AND circuits 39W42 of the precedence circuit 46 through the OR circuit 34 and the NOT circuit 35. In this case, the input signal IN0 is selected by the circuit 45 and is output to the output terminal OUT0. When the selective signal 30 has been provided, if the input signal IN0 does not exist, since all the AND circuits 22W25 output zero, the AND circuits 39W42 the circuit 46 can be operated, and the circuit 46 selects an input signal of high precedence, which exists at that moment.
COPYRIGHT: (C)1981,JPO&Japio
JP13417779A 1979-10-19 1979-10-19 Signal selective circuit Pending JPS5659352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13417779A JPS5659352A (en) 1979-10-19 1979-10-19 Signal selective circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13417779A JPS5659352A (en) 1979-10-19 1979-10-19 Signal selective circuit

Publications (1)

Publication Number Publication Date
JPS5659352A true JPS5659352A (en) 1981-05-22

Family

ID=15122237

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13417779A Pending JPS5659352A (en) 1979-10-19 1979-10-19 Signal selective circuit

Country Status (1)

Country Link
JP (1) JPS5659352A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6084652A (en) * 1983-10-15 1985-05-14 Nippon Telegr & Teleph Corp <Ntt> Access cycle assignment system
JPH01229352A (en) * 1988-03-09 1989-09-13 Nec Corp Storage device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52132648A (en) * 1976-04-28 1977-11-07 Nec Corp Priority selector circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52132648A (en) * 1976-04-28 1977-11-07 Nec Corp Priority selector circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6084652A (en) * 1983-10-15 1985-05-14 Nippon Telegr & Teleph Corp <Ntt> Access cycle assignment system
JPH01229352A (en) * 1988-03-09 1989-09-13 Nec Corp Storage device

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