JPS5517279A - Circuit for detecting load short-circuit - Google Patents

Circuit for detecting load short-circuit

Info

Publication number
JPS5517279A
JPS5517279A JP9063878A JP9063878A JPS5517279A JP S5517279 A JPS5517279 A JP S5517279A JP 9063878 A JP9063878 A JP 9063878A JP 9063878 A JP9063878 A JP 9063878A JP S5517279 A JPS5517279 A JP S5517279A
Authority
JP
Japan
Prior art keywords
output
current
pattern
circuit
pattern current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9063878A
Other languages
Japanese (ja)
Other versions
JPS618674B2 (en
Inventor
Toru Aisaka
Keiichiro Yanagida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9063878A priority Critical patent/JPS5517279A/en
Publication of JPS5517279A publication Critical patent/JPS5517279A/en
Publication of JPS618674B2 publication Critical patent/JPS618674B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Protection Of Static Devices (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Power Conversion In General (AREA)
  • Ac-Ac Conversion (AREA)

Abstract

PURPOSE: To prevent an unnecessary stopping operation by putting a detection circuit in insensitive condition when overshoot of real current or pattern current varies abruptly.
CONSTITUTION: Three output pulses 17, 19 and 21 from a first, second and third monostable multivibrator circuit 17, 19 and 20 are applied to an OR gate 22 to obtain their logical sum output 22. When amplifying said output 22 to pattern current 10-d and adding, an output 23 which has very high constant level when anyone of the three output pulses 17, 19 and 21 occurs while changes similarly with pattern current in other case is obtained. When subtracting 12-d which is obtained by full- wave rectifying said output 23 from that obtained by full-wave rectifying the real current in a subtractor 14, a signal 14-b is obtained which is drawn significantly when the polarity of the pattern current is switched or in case of abrupt change of the pattern current. Therefore, the difference between the output and pattern currents becomes great to avoid an operation of the detection circuit 15.
COPYRIGHT: (C)1980,JPO&Japio
JP9063878A 1978-07-25 1978-07-25 Circuit for detecting load short-circuit Granted JPS5517279A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9063878A JPS5517279A (en) 1978-07-25 1978-07-25 Circuit for detecting load short-circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9063878A JPS5517279A (en) 1978-07-25 1978-07-25 Circuit for detecting load short-circuit

Publications (2)

Publication Number Publication Date
JPS5517279A true JPS5517279A (en) 1980-02-06
JPS618674B2 JPS618674B2 (en) 1986-03-15

Family

ID=14004032

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9063878A Granted JPS5517279A (en) 1978-07-25 1978-07-25 Circuit for detecting load short-circuit

Country Status (1)

Country Link
JP (1) JPS5517279A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63192377U (en) * 1987-05-30 1988-12-12

Also Published As

Publication number Publication date
JPS618674B2 (en) 1986-03-15

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