JPS5517240A - Speed limit selector device for atc - Google Patents

Speed limit selector device for atc

Info

Publication number
JPS5517240A
JPS5517240A JP8861478A JP8861478A JPS5517240A JP S5517240 A JPS5517240 A JP S5517240A JP 8861478 A JP8861478 A JP 8861478A JP 8861478 A JP8861478 A JP 8861478A JP S5517240 A JPS5517240 A JP S5517240A
Authority
JP
Japan
Prior art keywords
circuit
output
channel
relay
speed limit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8861478A
Other languages
Japanese (ja)
Other versions
JPS6043721B2 (en
Inventor
Akizo Hashimoto
Hirotsugu Kousai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Signal Co Ltd
Original Assignee
Nippon Signal Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Signal Co Ltd filed Critical Nippon Signal Co Ltd
Priority to JP8861478A priority Critical patent/JPS6043721B2/en
Publication of JPS5517240A publication Critical patent/JPS5517240A/en
Publication of JPS6043721B2 publication Critical patent/JPS6043721B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Electric Propulsion And Braking For Vehicles (AREA)

Abstract

PURPOSE: To increase information reliability in a speed limit selector device that uses a parallel dual system receiver by suppressing, when two systems give signal detection outputs in any channel, the signal output of one system of other channel.
CONSTITUTION: When both of two detection circuits V1RA and V1RB of the first channel detect an ATC signal received through the antenna on a vehicle and give off signal detection outputs, the input voltage is applied to the base of transistor Tr1 of the first AND circuit, the transistor becomes ON, and receiving relay V1R is operated by the output from first detection circuit V1RA. At the time, the output of first AND circuit 1, i.e., the emitter voltage of Tr1, makes Tr2 of NOR circuit 5 ON and relay R is operated. By this, second AND circuit 2 is opened and the output of first OR circuit is not applied to receiver relay V1R. Thus, fail-safe reliability is increased.
COPYRIGHT: (C)1980,JPO&Japio
JP8861478A 1978-07-20 1978-07-20 ATC speed limit selection device Expired JPS6043721B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8861478A JPS6043721B2 (en) 1978-07-20 1978-07-20 ATC speed limit selection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8861478A JPS6043721B2 (en) 1978-07-20 1978-07-20 ATC speed limit selection device

Publications (2)

Publication Number Publication Date
JPS5517240A true JPS5517240A (en) 1980-02-06
JPS6043721B2 JPS6043721B2 (en) 1985-09-30

Family

ID=13947679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8861478A Expired JPS6043721B2 (en) 1978-07-20 1978-07-20 ATC speed limit selection device

Country Status (1)

Country Link
JP (1) JPS6043721B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7104892B2 (en) 2002-07-16 2006-09-12 Carl Freudenberg Kg Coupling

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7104892B2 (en) 2002-07-16 2006-09-12 Carl Freudenberg Kg Coupling

Also Published As

Publication number Publication date
JPS6043721B2 (en) 1985-09-30

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