JPS55165037A - Fm radio receiver - Google Patents

Fm radio receiver

Info

Publication number
JPS55165037A
JPS55165037A JP7340979A JP7340979A JPS55165037A JP S55165037 A JPS55165037 A JP S55165037A JP 7340979 A JP7340979 A JP 7340979A JP 7340979 A JP7340979 A JP 7340979A JP S55165037 A JPS55165037 A JP S55165037A
Authority
JP
Japan
Prior art keywords
circuit
signal
output
detection circuit
pilot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7340979A
Other languages
Japanese (ja)
Inventor
Yoshio Horiike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7340979A priority Critical patent/JPS55165037A/en
Publication of JPS55165037A publication Critical patent/JPS55165037A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE:To effectively reduce the unpleasant sound due to multi-paths at a strong electric field area, by taking the output signal from the pilot FM detection circuit as the control signal and controlling the switching means provided at the post stage of the FM detection circuit. CONSTITUTION:The PLL circuit 23 consisting of a phase comparison circuit 10, LPF11, voltage controlled oscillation circuit 13, and 1/2 frequency division circuit 14 is operated as the pilot FM detection circuit. When multi-paths are caused, the stereo composite signal M(t) being the output from the FM detection circuit 6 is in distortion and the components shown in equation (2) are produced with the production of the signal components produced by the distortion of (left audio signal L+right audio signal R) around the pilot signal in 19kHz, (where; ws=2piX38kHz), and the signal proportional to phi(t) is output from the circuit 10. When this output exceeds a given value, a DC ouput is produced from the DC voltage generating circuit 15 to turn on the electronic switch 8 via the hold circuit 16 and to connect the capacitor C to ground, resulting in attenuating the harmonics of the audio signal.
JP7340979A 1979-06-11 1979-06-11 Fm radio receiver Pending JPS55165037A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7340979A JPS55165037A (en) 1979-06-11 1979-06-11 Fm radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7340979A JPS55165037A (en) 1979-06-11 1979-06-11 Fm radio receiver

Publications (1)

Publication Number Publication Date
JPS55165037A true JPS55165037A (en) 1980-12-23

Family

ID=13517359

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7340979A Pending JPS55165037A (en) 1979-06-11 1979-06-11 Fm radio receiver

Country Status (1)

Country Link
JP (1) JPS55165037A (en)

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