JPS55160340A - Preventing circuit for error erasure of auto reverse unit - Google Patents

Preventing circuit for error erasure of auto reverse unit

Info

Publication number
JPS55160340A
JPS55160340A JP6803979A JP6803979A JPS55160340A JP S55160340 A JPS55160340 A JP S55160340A JP 6803979 A JP6803979 A JP 6803979A JP 6803979 A JP6803979 A JP 6803979A JP S55160340 A JPS55160340 A JP S55160340A
Authority
JP
Japan
Prior art keywords
recording
head
tape
track
preventing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6803979A
Other languages
Japanese (ja)
Inventor
Setsuo Kawasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6803979A priority Critical patent/JPS55160340A/en
Publication of JPS55160340A publication Critical patent/JPS55160340A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent recorded contents from being erased when a tape drive direction is reversed, by supplying a bias signal to a corresponding erasing head after change-over control over a recording/reproducing head from one track to the other.
CONSTITUTION: Recording/reproducing head 46 is arranged between erasing heads 42 and 43. While recording contents of one track on tape 47 are reproduced, contact 24 of recording/reproducing switch 22 is opened and bias oscillating circuit 29 is inoperative. Then, when the drive direction of tape 47 is inverted to start recording on the other track, moving piece 26 of switch 22 is connected to contact 24 and after change-over control over head 46 to the other track side of tape 47 is exercised completely, circuit 29 supplies an AC bias signal to head 43.
COPYRIGHT: (C)1980,JPO&Japio
JP6803979A 1979-05-31 1979-05-31 Preventing circuit for error erasure of auto reverse unit Pending JPS55160340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6803979A JPS55160340A (en) 1979-05-31 1979-05-31 Preventing circuit for error erasure of auto reverse unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6803979A JPS55160340A (en) 1979-05-31 1979-05-31 Preventing circuit for error erasure of auto reverse unit

Publications (1)

Publication Number Publication Date
JPS55160340A true JPS55160340A (en) 1980-12-13

Family

ID=13362249

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6803979A Pending JPS55160340A (en) 1979-05-31 1979-05-31 Preventing circuit for error erasure of auto reverse unit

Country Status (1)

Country Link
JP (1) JPS55160340A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6064538A (en) * 1997-02-17 2000-05-16 Funai Electric Co., Ltd. Biasing/erasing oscillation circuit for magnetic tape recording apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6064538A (en) * 1997-02-17 2000-05-16 Funai Electric Co., Ltd. Biasing/erasing oscillation circuit for magnetic tape recording apparatus

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