JPS55157067A - Integration circuit - Google Patents
Integration circuitInfo
- Publication number
- JPS55157067A JPS55157067A JP6482679A JP6482679A JPS55157067A JP S55157067 A JPS55157067 A JP S55157067A JP 6482679 A JP6482679 A JP 6482679A JP 6482679 A JP6482679 A JP 6482679A JP S55157067 A JPS55157067 A JP S55157067A
- Authority
- JP
- Japan
- Prior art keywords
- switch
- period
- voltage
- offset
- integration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE: To enable to obtain highly accurate integration output having an even slope proportional to an input voltage, even with environmental change, by compensating the voltage at a storage circuit with an auxiliary integrator over a compensation period.
CONSTITUTION: A switch 21 is open at time t1, the voltage stored in a voltage storage capacitor 23 is fed to an auxiliary integrator 26 and integration is made as it is. Further, a switch 13 is open at time t5 and a switch 11 is closed. Next, the offset compensation period for closing and opening a switch 19 is taken as normal compensating circuit state. After the operation of compensation like this, a switch t11 is open, the switch 13 is closed and a switch 21 is closed at time t2 to complete the compensation period. In this state, when the integration is made for a long time along the straight line 41, nonlinearity is obtained again with the change in the offset voltage. Further, the offset compensation is made by providing similar compensating period for the period T of times t3 and t4. Thus, even if the offset voltage is changed during the integration period of a long time, no offset error is caused.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6482679A JPS55157067A (en) | 1979-05-24 | 1979-05-24 | Integration circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6482679A JPS55157067A (en) | 1979-05-24 | 1979-05-24 | Integration circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55157067A true JPS55157067A (en) | 1980-12-06 |
JPS5646181B2 JPS5646181B2 (en) | 1981-10-31 |
Family
ID=13269429
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6482679A Granted JPS55157067A (en) | 1979-05-24 | 1979-05-24 | Integration circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55157067A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5840686A (en) * | 1981-08-14 | 1983-03-09 | 旭化成マイクロシステム株式会社 | Monolithic programable gain-integrator |
WO2020105417A1 (en) * | 2018-11-19 | 2020-05-28 | 日本電信電話株式会社 | Variable reference voltage source |
-
1979
- 1979-05-24 JP JP6482679A patent/JPS55157067A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5840686A (en) * | 1981-08-14 | 1983-03-09 | 旭化成マイクロシステム株式会社 | Monolithic programable gain-integrator |
WO2020105417A1 (en) * | 2018-11-19 | 2020-05-28 | 日本電信電話株式会社 | Variable reference voltage source |
JP2020085533A (en) * | 2018-11-19 | 2020-06-04 | 日本電信電話株式会社 | Variable reference voltage source |
Also Published As
Publication number | Publication date |
---|---|
JPS5646181B2 (en) | 1981-10-31 |
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