JPS55153453A - Communication control unit - Google Patents

Communication control unit

Info

Publication number
JPS55153453A
JPS55153453A JP6093779A JP6093779A JPS55153453A JP S55153453 A JPS55153453 A JP S55153453A JP 6093779 A JP6093779 A JP 6093779A JP 6093779 A JP6093779 A JP 6093779A JP S55153453 A JPS55153453 A JP S55153453A
Authority
JP
Japan
Prior art keywords
circuit
data
fed
unit
flag
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6093779A
Other languages
Japanese (ja)
Other versions
JPS5953743B2 (en
Inventor
Takeshi Sasaki
Masaki Tsuchiya
Hiroyuki Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP54060937A priority Critical patent/JPS5953743B2/en
Publication of JPS55153453A publication Critical patent/JPS55153453A/en
Publication of JPS5953743B2 publication Critical patent/JPS5953743B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0078Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083Formatting with frames or packets; Protocol or part of protocol for error control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To enable to perform the processing of control steps different in frame architecure by means of one circuit constitution, by switching the two control means at the change-over circuit with the instruction from the data processor and altering the processing mode. CONSTITUTION:In case of data reception of the high level data link control steps, the change-over circuit 10 inputs the first flag to the first data buffer DB4 and the specific data detection circuit 7'' in the state of solid lines as shown in Figure with the instruction of the data processor 2, and the cricuit 7'' detects it and closes the gate circuit 8. Succeedingly, the data are sequentially transferred to the second DB5 and the third DB9, but the circuit 8 is closed and the flag is not fed to the unit 2. After this, the circuit 8 is opened and the data are fed to the unit 2. When the final flag is input, the circuit 7'' detects this, the circuit 8 is closed, and the insepction of error in the data is made at the operation circuit 6 and the result is informed to the unit 2. In the case of the basic type data transmission and control steps, the circuit 10 is in the state of dotted lines in Figure, the data are fed to DB9, and the output of DB9 is fed to the unit 2 and the circuit 6, for error inspection.
JP54060937A 1979-05-17 1979-05-17 Communication control device Expired JPS5953743B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54060937A JPS5953743B2 (en) 1979-05-17 1979-05-17 Communication control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54060937A JPS5953743B2 (en) 1979-05-17 1979-05-17 Communication control device

Publications (2)

Publication Number Publication Date
JPS55153453A true JPS55153453A (en) 1980-11-29
JPS5953743B2 JPS5953743B2 (en) 1984-12-26

Family

ID=13156782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54060937A Expired JPS5953743B2 (en) 1979-05-17 1979-05-17 Communication control device

Country Status (1)

Country Link
JP (1) JPS5953743B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02100749A (en) * 1988-08-26 1990-04-12 Tektronix Inc Data-buffer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02100749A (en) * 1988-08-26 1990-04-12 Tektronix Inc Data-buffer

Also Published As

Publication number Publication date
JPS5953743B2 (en) 1984-12-26

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