JPS55151839A - Automatic level control circuit for telephone - Google Patents
Automatic level control circuit for telephoneInfo
- Publication number
- JPS55151839A JPS55151839A JP5909979A JP5909979A JPS55151839A JP S55151839 A JPS55151839 A JP S55151839A JP 5909979 A JP5909979 A JP 5909979A JP 5909979 A JP5909979 A JP 5909979A JP S55151839 A JPS55151839 A JP S55151839A
- Authority
- JP
- Japan
- Prior art keywords
- control
- dial
- level
- circuit
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M1/00—Substation equipment, e.g. for use by subscribers
- H04M1/26—Devices for calling a subscriber
- H04M1/30—Devices which can set up and transmit only one digit at a time
- H04M1/50—Devices which can set up and transmit only one digit at a time by generating or selecting currents of predetermined frequencies or combinations of frequencies
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To reduce the change of the dial DC level by giving the control to the bias state of the amplifying circuit forming the output circuit of the dial generator and thus controlling the DC power consumption of the amplifying circuit, thus preventing the malfunction of the exchange. CONSTITUTION:Control part 5 of the automatic level control circuit detects the current supplied from the station, and then generates the binary signal. Controlled part 6 receive the control signal from part 5 through control signal line 8. And in case the control is given to the AC level of the dial signal, the control is also given concurrently to the bias state of amplifying circuit 3 forming the output circuit of dial generator 2. Thus the DC power consumption is controlled for circuit 3 to eliminate the change of the dial DC level. As a result, the malfunction can be avoided for the exchange.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5909979A JPS5928307B2 (en) | 1979-05-16 | 1979-05-16 | Dial signal automatic level adjustment circuit for telephones |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5909979A JPS5928307B2 (en) | 1979-05-16 | 1979-05-16 | Dial signal automatic level adjustment circuit for telephones |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55151839A true JPS55151839A (en) | 1980-11-26 |
JPS5928307B2 JPS5928307B2 (en) | 1984-07-12 |
Family
ID=13103539
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5909979A Expired JPS5928307B2 (en) | 1979-05-16 | 1979-05-16 | Dial signal automatic level adjustment circuit for telephones |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5928307B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59500344A (en) * | 1982-03-04 | 1984-03-01 | エステイーシー・ピーエルシー | gain adjustment circuit |
-
1979
- 1979-05-16 JP JP5909979A patent/JPS5928307B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59500344A (en) * | 1982-03-04 | 1984-03-01 | エステイーシー・ピーエルシー | gain adjustment circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS5928307B2 (en) | 1984-07-12 |
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