JPS55147887A - Synchronism re-acquisition system - Google Patents

Synchronism re-acquisition system

Info

Publication number
JPS55147887A
JPS55147887A JP5584279A JP5584279A JPS55147887A JP S55147887 A JPS55147887 A JP S55147887A JP 5584279 A JP5584279 A JP 5584279A JP 5584279 A JP5584279 A JP 5584279A JP S55147887 A JPS55147887 A JP S55147887A
Authority
JP
Japan
Prior art keywords
transmission
circuit
output
frame
acquisition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5584279A
Other languages
Japanese (ja)
Other versions
JPS5943033B2 (en
Inventor
Makoto Hiraoka
Osamu Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54055842A priority Critical patent/JPS5943033B2/en
Publication of JPS55147887A publication Critical patent/JPS55147887A/en
Publication of JPS5943033B2 publication Critical patent/JPS5943033B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To prevent long-time picture quality degradation by performing always re-acquisition for occurrence of instantaneous disconnection of the transmission line in the synchronism re-acquisition system in the transmission system using a buffer memory. CONSTITUTION:The inter-frame coded input signal is outputted through transmission frame synchronizing circuit 1 and decoder 2. Transmission line step out signal generating circuit 3 sets FF 6 when frame step out is detected. The output of frame synchronizing circuit 4 for transmission and receiving timing matching appears in the output of AND circuit 8 only when FF 6 is set. Timing generation part 5 generates pulses which indicate an allowable width for the frame synchronizing signal for transmission and receiving timing matching. When step out occurs due to instantaneous disconnection of the transmission line, the output appears in circuit 8, and generation part 5 performs re-acquisition by this output (reset pulse), thus preventing degradation of the picture quality for a long time.
JP54055842A 1979-05-08 1979-05-08 Synchronous re-entry circuit Expired JPS5943033B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54055842A JPS5943033B2 (en) 1979-05-08 1979-05-08 Synchronous re-entry circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54055842A JPS5943033B2 (en) 1979-05-08 1979-05-08 Synchronous re-entry circuit

Publications (2)

Publication Number Publication Date
JPS55147887A true JPS55147887A (en) 1980-11-18
JPS5943033B2 JPS5943033B2 (en) 1984-10-19

Family

ID=13010251

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54055842A Expired JPS5943033B2 (en) 1979-05-08 1979-05-08 Synchronous re-entry circuit

Country Status (1)

Country Link
JP (1) JPS5943033B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6957930B2 (en) 2017-03-29 2021-11-02 三菱自動車工業株式会社 Ground structure of drive unit for electric vehicle
JP2020089166A (en) * 2018-11-29 2020-06-04 株式会社デンソー Vehicle power transmission device

Also Published As

Publication number Publication date
JPS5943033B2 (en) 1984-10-19

Similar Documents

Publication Publication Date Title
ES353731A1 (en) Facsimile multiplex system
JPS5731247A (en) Multiplexing tramsmission system
ES8202231A1 (en) Controlled output composite keying signal generator for a television receiver
GB2257603B (en) SDH data transmission timing
JPS55147887A (en) Synchronism re-acquisition system
ES381780A1 (en) Method of and circuit arrangement for picture transmission using multiplex techniques
JPS5753163A (en) Preventing system for false acquisition of synchronization in start-stop synchronizing transmission system
JPS57129076A (en) Television telephone system
JPS5216919A (en) Television device
JPS5668042A (en) Data transmission system
JPS5320813A (en) Transmission system of television signal
JPS5595444A (en) Externally-synchronous scrambler/descrambler system
MY106069A (en) Apparatus for correcting distorted sync in a composite video signal
SU876073A3 (en) Information decoding device
JPS5713868A (en) Two-screen television receiver
JPS5528620A (en) Synchronizing system of communication line
JPS573447A (en) Time division multidimension connecting device
JPS5465403A (en) Reception time correcting circuit
DK0554268T3 (en) Method and apparatus for transmitting synchronization signals in a network of synchronous digital hierarchy
KR960007101Y1 (en) Cluck generator
JPS5732188A (en) Pcm picture transmission system
GB1384336A (en) Telegraphic receiving apparatus
JPS5320814A (en) Reception system for static picture signal
JPS55147051A (en) Monitor system for radio line
JPS5689148A (en) Radio device of switching without instantaneous break