JPS55147716A - Electronic computer - Google Patents

Electronic computer

Info

Publication number
JPS55147716A
JPS55147716A JP5507679A JP5507679A JPS55147716A JP S55147716 A JPS55147716 A JP S55147716A JP 5507679 A JP5507679 A JP 5507679A JP 5507679 A JP5507679 A JP 5507679A JP S55147716 A JPS55147716 A JP S55147716A
Authority
JP
Japan
Prior art keywords
memory
buffer
circuit
initial program
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5507679A
Other languages
Japanese (ja)
Other versions
JPS6148746B2 (en
Inventor
Akio Kumagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP5507679A priority Critical patent/JPS55147716A/en
Publication of JPS55147716A publication Critical patent/JPS55147716A/en
Publication of JPS6148746B2 publication Critical patent/JPS6148746B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To simplify the constitution and to make the size small by selecting the buffer and introducing the application program of external memory to the main memory through the initial program introduced to the memory, in the computer having the volatile main memory.
CONSTITUTION: The decision circuit 15 determines the selection of either buffer of the buffer 13 linked to the address terminal of the main memory 3 or the bus buffer 14 linked to the address terminal of the initial program loader 6. On the other hand, the alteration circuit 16 changes the status of the circuit 15 with the address output to the loader 6 from the buffer 14. Further, at the application of power supply, the circuit 15 selects the buffer 14, introduces it to the memory 3, and when the introduction of the initial program is finished, the curcuit 16 is operated to change the status of the circuit 15, the buffer 13 is selected and the application program in the external memory 4 is introduced to the memory 3 with the initial program introduced to the memory 3. Thus, the initial program is automatically loaded to the memory 3 to simplify the constitution and to make the size small.
COPYRIGHT: (C)1980,JPO&Japio
JP5507679A 1979-05-04 1979-05-04 Electronic computer Granted JPS55147716A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5507679A JPS55147716A (en) 1979-05-04 1979-05-04 Electronic computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5507679A JPS55147716A (en) 1979-05-04 1979-05-04 Electronic computer

Publications (2)

Publication Number Publication Date
JPS55147716A true JPS55147716A (en) 1980-11-17
JPS6148746B2 JPS6148746B2 (en) 1986-10-25

Family

ID=12988604

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5507679A Granted JPS55147716A (en) 1979-05-04 1979-05-04 Electronic computer

Country Status (1)

Country Link
JP (1) JPS55147716A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875229A (en) * 1981-10-28 1983-05-06 Nec Corp Bootstrap loading system of data processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875229A (en) * 1981-10-28 1983-05-06 Nec Corp Bootstrap loading system of data processor

Also Published As

Publication number Publication date
JPS6148746B2 (en) 1986-10-25

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