JPS5514744A - Output circuit - Google Patents

Output circuit

Info

Publication number
JPS5514744A
JPS5514744A JP8738578A JP8738578A JPS5514744A JP S5514744 A JPS5514744 A JP S5514744A JP 8738578 A JP8738578 A JP 8738578A JP 8738578 A JP8738578 A JP 8738578A JP S5514744 A JPS5514744 A JP S5514744A
Authority
JP
Japan
Prior art keywords
output
terminal
input
inverter
igfetq1
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8738578A
Other languages
Japanese (ja)
Inventor
Koichiro Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8738578A priority Critical patent/JPS5514744A/en
Publication of JPS5514744A publication Critical patent/JPS5514744A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • H03K19/09443Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors

Abstract

PURPOSE:To increase the dielectric strength of the output side by leading the output of the output circuit of the output inverter or the like out to the output terminal via depletion mode IGFET's in series. CONSTITUTION:When the circuit operates in the output mode, the gate output against input I1 and I2 of two input NAND circuits 30 and 31 is led out to terminal 40 via output inverter 32 and IGFETQ1. For IGFETQ1 the resistance can be reduced at the conducting time for the sufficient driving of the external load via terminal 40. When the circuit operates in the input mode, the input signal sent through terminal 40 is turned to inverse output O1 via protective circuit 34 within input inverter 33. In this case, IGFETQ1, as the gate is connected to VCC, features higher drain dielectric strength than when the gate is grounded and thus protects inverter 32 from the excessive input voltage given from terminal 40.
JP8738578A 1978-07-17 1978-07-17 Output circuit Pending JPS5514744A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8738578A JPS5514744A (en) 1978-07-17 1978-07-17 Output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8738578A JPS5514744A (en) 1978-07-17 1978-07-17 Output circuit

Publications (1)

Publication Number Publication Date
JPS5514744A true JPS5514744A (en) 1980-02-01

Family

ID=13913420

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8738578A Pending JPS5514744A (en) 1978-07-17 1978-07-17 Output circuit

Country Status (1)

Country Link
JP (1) JPS5514744A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5848530A (en) * 1981-09-18 1983-03-22 Nec Corp Input circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179524A (en) * 1975-01-06 1976-07-10 Hitachi Ltd
JPS5354486A (en) * 1976-10-27 1978-05-17 Nec Corp Output protecting circuit of integrated circuit device
JPS5362949A (en) * 1976-11-17 1978-06-05 Toshiba Corp Input/output buffer circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179524A (en) * 1975-01-06 1976-07-10 Hitachi Ltd
JPS5354486A (en) * 1976-10-27 1978-05-17 Nec Corp Output protecting circuit of integrated circuit device
JPS5362949A (en) * 1976-11-17 1978-06-05 Toshiba Corp Input/output buffer circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5848530A (en) * 1981-09-18 1983-03-22 Nec Corp Input circuit
JPH0381330B2 (en) * 1981-09-18 1991-12-27 Nippon Electric Co

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