JPS55147053A - Error correction circuit - Google Patents

Error correction circuit

Info

Publication number
JPS55147053A
JPS55147053A JP5502779A JP5502779A JPS55147053A JP S55147053 A JPS55147053 A JP S55147053A JP 5502779 A JP5502779 A JP 5502779A JP 5502779 A JP5502779 A JP 5502779A JP S55147053 A JPS55147053 A JP S55147053A
Authority
JP
Japan
Prior art keywords
error
signal
demodulator
input
band
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5502779A
Other languages
Japanese (ja)
Other versions
JPS6244449B2 (en
Inventor
Junji Namiki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5502779A priority Critical patent/JPS55147053A/en
Publication of JPS55147053A publication Critical patent/JPS55147053A/en
Publication of JPS6244449B2 publication Critical patent/JPS6244449B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2272—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals using phase locked loops

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

PURPOSE:To enable to correct and reject the code error at the reception side only, by using the redundancy band of telephone line in the 0-4kHz band, other than 0.3-3.4kHz, in the digital transmission of audio signal. CONSTITUTION:The audio digital signal in quadri-phase modulation is digital- coded for the amplitude of the in-phase and orthogonal components at the quadri- phase modulation detector 9,000 and enters the demodulator 5,000 and the error candidate detector 8,000. The output signal of the demodulator 5,000 including noise due to code error passes through the delay line 2,001 of the error rejection circuit 2,000 and is input to the subtractor 2,002. On the other hand, the output of the demodulator 5,000 passes through the error detection filter 1,000 and is input to the multiplier 2,003 after the signal outside the audio band of 0-0.3kHz and 3.4- 4kHz is extracted. The error candidate detection signal produced near the signal identification boundary line is delayed at the delay line 2,004 and enters the multplier 2,003, the output signal of the filter 1,000 is gated and input to the subtrator 2,002, to eliminate the noise due to the code error of demodulated output.
JP5502779A 1979-05-04 1979-05-04 Error correction circuit Granted JPS55147053A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5502779A JPS55147053A (en) 1979-05-04 1979-05-04 Error correction circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5502779A JPS55147053A (en) 1979-05-04 1979-05-04 Error correction circuit

Publications (2)

Publication Number Publication Date
JPS55147053A true JPS55147053A (en) 1980-11-15
JPS6244449B2 JPS6244449B2 (en) 1987-09-21

Family

ID=12987175

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5502779A Granted JPS55147053A (en) 1979-05-04 1979-05-04 Error correction circuit

Country Status (1)

Country Link
JP (1) JPS55147053A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6248126A (en) * 1985-08-27 1987-03-02 Nec Corp Error correcting coding and decoding device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6248126A (en) * 1985-08-27 1987-03-02 Nec Corp Error correcting coding and decoding device

Also Published As

Publication number Publication date
JPS6244449B2 (en) 1987-09-21

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