JPS55143840A - Logical operation circuit - Google Patents

Logical operation circuit

Info

Publication number
JPS55143840A
JPS55143840A JP5195479A JP5195479A JPS55143840A JP S55143840 A JPS55143840 A JP S55143840A JP 5195479 A JP5195479 A JP 5195479A JP 5195479 A JP5195479 A JP 5195479A JP S55143840 A JPS55143840 A JP S55143840A
Authority
JP
Japan
Prior art keywords
diode
circuit
clamp circuit
logical operation
diodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5195479A
Other languages
Japanese (ja)
Inventor
Masaaki Kanda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5195479A priority Critical patent/JPS55143840A/en
Publication of JPS55143840A publication Critical patent/JPS55143840A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/088—Transistor-transistor logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To make the switching operation high-speed in the TTL-system logical operation circuit having an off buffer circuit, by adding a clamp circuit. CONSTITUTION:A clamp circuit is formed with diodes 18 and 19. The anode of diode 18 is connected to the base of current driving transistor TR11, and the cathode is connected to the anode of diode 19, and the cathode of diode 19 is connected to output electrode 3. When the clamp circuit is added in this manner, diodes 18 and 19 become conductive to cut off current driving TR11 when the collector potential of output TR12 is lowered to a prescribed level or less. Continuously, off buffer TR13, 14 are conductive, and the potential of output electrode 3 rises rapidly. Thus, a high-speed switching operation is possible.
JP5195479A 1979-04-26 1979-04-26 Logical operation circuit Pending JPS55143840A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5195479A JPS55143840A (en) 1979-04-26 1979-04-26 Logical operation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5195479A JPS55143840A (en) 1979-04-26 1979-04-26 Logical operation circuit

Publications (1)

Publication Number Publication Date
JPS55143840A true JPS55143840A (en) 1980-11-10

Family

ID=12901260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5195479A Pending JPS55143840A (en) 1979-04-26 1979-04-26 Logical operation circuit

Country Status (1)

Country Link
JP (1) JPS55143840A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5830234A (en) * 1981-08-18 1983-02-22 Fujitsu Ltd Logical circuit
JPS58189630U (en) * 1982-06-11 1983-12-16 日本電気株式会社 logic circuit
JPS591240U (en) * 1982-06-24 1984-01-06 日本電気株式会社 logic circuit
JPS59149725U (en) * 1983-03-24 1984-10-06 サンケン電気株式会社 transistor switching circuit
JPS6190518A (en) * 1984-10-09 1986-05-08 Fujitsu Ltd Totem pole type output circuit
EP0189564A2 (en) * 1985-01-31 1986-08-06 Texas Instruments Incorporated High to low transition speed up circuit for TTL-type gates
JPS61290820A (en) * 1985-06-19 1986-12-20 Hitachi Micro Comput Eng Ltd Logic circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5830234A (en) * 1981-08-18 1983-02-22 Fujitsu Ltd Logical circuit
JPS58189630U (en) * 1982-06-11 1983-12-16 日本電気株式会社 logic circuit
JPS591240U (en) * 1982-06-24 1984-01-06 日本電気株式会社 logic circuit
JPS59149725U (en) * 1983-03-24 1984-10-06 サンケン電気株式会社 transistor switching circuit
JPS6190518A (en) * 1984-10-09 1986-05-08 Fujitsu Ltd Totem pole type output circuit
EP0189564A2 (en) * 1985-01-31 1986-08-06 Texas Instruments Incorporated High to low transition speed up circuit for TTL-type gates
JPS61177022A (en) * 1985-01-31 1986-08-08 テキサス　インスツルメンツ　インコーポレイテツド Transition acceleration circuit
JPS61290820A (en) * 1985-06-19 1986-12-20 Hitachi Micro Comput Eng Ltd Logic circuit

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