JPS55141826A - Input circuit for integrated circuit - Google Patents
Input circuit for integrated circuitInfo
- Publication number
- JPS55141826A JPS55141826A JP5108479A JP5108479A JPS55141826A JP S55141826 A JPS55141826 A JP S55141826A JP 5108479 A JP5108479 A JP 5108479A JP 5108479 A JP5108479 A JP 5108479A JP S55141826 A JPS55141826 A JP S55141826A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- terminal
- resistor
- pull
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To minimize the current flowing into the pull-up resistor and to enable the control with one circuit switch, by controlling the gate of the transistor having smaller mutual conductance connected between the input terminal and the power supply. CONSTITUTION:When the output of the flip flop 413 shows operating state, the terminal 414 is at low level, to turn on the transistor 401 having smaller mutual conductance, constituting the pull-up resistor. Further, since the transistor 403 is ON and 405 is OFF, the transistors 404 and 406 constitute complementary inverter to output the signal inverting the input terminal 402. When the output of the flip flop 413 shows stationary state, the transistor 401 is OFF and the pull-up resistor is cut off. In this case, since the terminal 402 is in float, the transistor 405 in ON and 403 is OFF to make low level the terminal 407 compulsively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5108479A JPS55141826A (en) | 1979-04-24 | 1979-04-24 | Input circuit for integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5108479A JPS55141826A (en) | 1979-04-24 | 1979-04-24 | Input circuit for integrated circuit |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2031915A Division JPH02243017A (en) | 1990-02-13 | 1990-02-13 | Input circuit for integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55141826A true JPS55141826A (en) | 1980-11-06 |
JPH0114735B2 JPH0114735B2 (en) | 1989-03-14 |
Family
ID=12876946
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5108479A Granted JPS55141826A (en) | 1979-04-24 | 1979-04-24 | Input circuit for integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55141826A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5919434A (en) * | 1982-07-23 | 1984-01-31 | Hitachi Ltd | Level guarantee circuit |
JPS62259292A (en) * | 1987-03-20 | 1987-11-11 | Toshiba Corp | Semiconductor integrated circuit device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5376719A (en) * | 1976-12-20 | 1978-07-07 | Fujitsu Ltd | Output buffer circuit with tri-state control |
JPS53117932A (en) * | 1977-03-25 | 1978-10-14 | Hitachi Ltd | Input circuit |
JPS53118313A (en) * | 1977-03-25 | 1978-10-16 | Nec Corp | Key input circuit |
-
1979
- 1979-04-24 JP JP5108479A patent/JPS55141826A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5376719A (en) * | 1976-12-20 | 1978-07-07 | Fujitsu Ltd | Output buffer circuit with tri-state control |
JPS53117932A (en) * | 1977-03-25 | 1978-10-14 | Hitachi Ltd | Input circuit |
JPS53118313A (en) * | 1977-03-25 | 1978-10-16 | Nec Corp | Key input circuit |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5919434A (en) * | 1982-07-23 | 1984-01-31 | Hitachi Ltd | Level guarantee circuit |
JPH05890B2 (en) * | 1982-07-23 | 1993-01-07 | Hitachi Ltd | |
JPS62259292A (en) * | 1987-03-20 | 1987-11-11 | Toshiba Corp | Semiconductor integrated circuit device |
Also Published As
Publication number | Publication date |
---|---|
JPH0114735B2 (en) | 1989-03-14 |
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