JPS55135408A - Integrated circuit for pre-emphasis - Google Patents
Integrated circuit for pre-emphasisInfo
- Publication number
- JPS55135408A JPS55135408A JP4298779A JP4298779A JPS55135408A JP S55135408 A JPS55135408 A JP S55135408A JP 4298779 A JP4298779 A JP 4298779A JP 4298779 A JP4298779 A JP 4298779A JP S55135408 A JPS55135408 A JP S55135408A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- terminal
- emphasis
- feedback circuit
- recording
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G5/00—Tone control or bandwidth control in amplifiers
Abstract
PURPOSE:To decrease the difference of the frequency deviation quantity for the pre- emphasis integrated circuit used for recording of the luminance signal of the VTR, by forming the emphasis circuit with the differntial amplifier and the negative feedback circuit and then switching the frequency property of the negative feedback circuit via the switch. CONSTITUTION:The input signal is supplied through terminal 41 and then delivered to terminal 43 via amplifier 42. For the SP (standard time pictre recording/ reproduction), terminal 66 is set at a low potential with use of only feedback circuit 44. In the case of the LP (long time picture recording/reproduction), terminal 66 is set at a high potential. And transistors 56 and 59 of the switch circuit are turned on, and circuit 44 is used along with feedback circuit 45 which varies its feedback factor according to the signal level. Thus the same amplifier is used for both the SP and LP, accordingly the difference can be reduced for the freqency deviation quantity. Furthermore, the number can be reduced as well for the peripheral parts and terminal pins when the integration is given.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4298779A JPS55135408A (en) | 1979-04-11 | 1979-04-11 | Integrated circuit for pre-emphasis |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4298779A JPS55135408A (en) | 1979-04-11 | 1979-04-11 | Integrated circuit for pre-emphasis |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55135408A true JPS55135408A (en) | 1980-10-22 |
JPS6258169B2 JPS6258169B2 (en) | 1987-12-04 |
Family
ID=12651376
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4298779A Granted JPS55135408A (en) | 1979-04-11 | 1979-04-11 | Integrated circuit for pre-emphasis |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55135408A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5791320U (en) * | 1980-11-26 | 1982-06-05 | ||
JPS6096909A (en) * | 1983-10-31 | 1985-05-30 | Sony Corp | Pre-emphasis circuit |
US5436729A (en) * | 1991-11-27 | 1995-07-25 | Hitachi, Ltd. | Video signal processing apparatus with automatic picture quality control function and signal processing circuit |
-
1979
- 1979-04-11 JP JP4298779A patent/JPS55135408A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5791320U (en) * | 1980-11-26 | 1982-06-05 | ||
JPS6096909A (en) * | 1983-10-31 | 1985-05-30 | Sony Corp | Pre-emphasis circuit |
US5436729A (en) * | 1991-11-27 | 1995-07-25 | Hitachi, Ltd. | Video signal processing apparatus with automatic picture quality control function and signal processing circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6258169B2 (en) | 1987-12-04 |
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