JPS5513515A - Communication control unit - Google Patents

Communication control unit

Info

Publication number
JPS5513515A
JPS5513515A JP8510278A JP8510278A JPS5513515A JP S5513515 A JPS5513515 A JP S5513515A JP 8510278 A JP8510278 A JP 8510278A JP 8510278 A JP8510278 A JP 8510278A JP S5513515 A JPS5513515 A JP S5513515A
Authority
JP
Japan
Prior art keywords
circuit
detection
output
communication control
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8510278A
Other languages
Japanese (ja)
Other versions
JPS5733741B2 (en
Inventor
Takeshi Harakawa
Nobuhiro Koyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8510278A priority Critical patent/JPS5513515A/en
Publication of JPS5513515A publication Critical patent/JPS5513515A/en
Publication of JPS5733741B2 publication Critical patent/JPS5733741B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Communication Control (AREA)

Abstract

PURPOSE: To avoid a needless CD off detection processing by giving a function to suppress the carrier detect (CD) off detection immediately after line connection.
CONSTITUTION: Communication control unit 1 is connected to a CPU through channel interface control part 2 and is connected to a communication line through MODEM interface control part 3 and performs the communication control. Output 19 of CD off detection circuit 9 and output 16 of CD off detection availability indication circuit 6 which controls the CD off detection suppression indication from the CPU are inputted to AND circuit 7; and AND circuit 7 is operated when both outputs are "1", and its output 17 is inputted to line disconnection report circuit 8. The output of line disconnection report circuit 8 is connected to channel interface control part 2 and is provided with a function to report the line disconnection to the CPU.
COPYRIGHT: (C)1980,JPO&Japio
JP8510278A 1978-07-14 1978-07-14 Communication control unit Granted JPS5513515A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8510278A JPS5513515A (en) 1978-07-14 1978-07-14 Communication control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8510278A JPS5513515A (en) 1978-07-14 1978-07-14 Communication control unit

Publications (2)

Publication Number Publication Date
JPS5513515A true JPS5513515A (en) 1980-01-30
JPS5733741B2 JPS5733741B2 (en) 1982-07-19

Family

ID=13849242

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8510278A Granted JPS5513515A (en) 1978-07-14 1978-07-14 Communication control unit

Country Status (1)

Country Link
JP (1) JPS5513515A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51124339A (en) * 1975-04-23 1976-10-29 Nec Corp Circuit control system
JPS5255451A (en) * 1975-10-30 1977-05-06 Motorola Inc Digital device for synchronous data communication

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51124339A (en) * 1975-04-23 1976-10-29 Nec Corp Circuit control system
JPS5255451A (en) * 1975-10-30 1977-05-06 Motorola Inc Digital device for synchronous data communication

Also Published As

Publication number Publication date
JPS5733741B2 (en) 1982-07-19

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