JPS55134562A - Direct-current regenerating circuit - Google Patents

Direct-current regenerating circuit

Info

Publication number
JPS55134562A
JPS55134562A JP4178879A JP4178879A JPS55134562A JP S55134562 A JPS55134562 A JP S55134562A JP 4178879 A JP4178879 A JP 4178879A JP 4178879 A JP4178879 A JP 4178879A JP S55134562 A JPS55134562 A JP S55134562A
Authority
JP
Japan
Prior art keywords
emitter
base
difference
terminal
pulse amplitude
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4178879A
Other languages
Japanese (ja)
Inventor
Toshio Takeshi
Toshikazu Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4178879A priority Critical patent/JPS55134562A/en
Publication of JPS55134562A publication Critical patent/JPS55134562A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/065—Binary decisions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/062—Setting decision thresholds using feedforward techniques only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To improve greatly the variation of a clamp voltage by using transistor Tr for a DC regenerating circuit composed of a capacitor and resistance. CONSTITUTION:To the output of capacitor 11 series-connected to input terminal 14, resistance R12 and the emitter of Tr13 are connected and reference voltage Vref is applied to the base of Tr13. When signal 2 of pulse amplitude V, pulse width tau and period 2T, and a signal of period T with its pulse amplitude equal to pulse width are applied to terminal 14, output signals of terminal 15 are shown by fig. (c) and fig. (d). Here, emitter currents of Tr13 at the time of signals (c) and (d) are denoted as IE1 and IE2, base-emitter voltages are represented by VBE1 and VBE2, and a base-emitter potential when no input signal arrives is VBE0. As a result, when the pulse amplitude is large, the difference between currents IE1 and IE2 is constant and the difference between voltages VBE1 and VBE2 providing this current difference can be reduced by using Tr, so that the variation of the clamp voltage can greatly be improved.
JP4178879A 1979-04-06 1979-04-06 Direct-current regenerating circuit Pending JPS55134562A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4178879A JPS55134562A (en) 1979-04-06 1979-04-06 Direct-current regenerating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4178879A JPS55134562A (en) 1979-04-06 1979-04-06 Direct-current regenerating circuit

Publications (1)

Publication Number Publication Date
JPS55134562A true JPS55134562A (en) 1980-10-20

Family

ID=12618079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4178879A Pending JPS55134562A (en) 1979-04-06 1979-04-06 Direct-current regenerating circuit

Country Status (1)

Country Link
JP (1) JPS55134562A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57133717A (en) * 1981-02-10 1982-08-18 Matsushita Electric Works Ltd Pulse detecting circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57133717A (en) * 1981-02-10 1982-08-18 Matsushita Electric Works Ltd Pulse detecting circuit
JPH0249077B2 (en) * 1981-02-10 1990-10-29 Matsushita Electric Works Ltd

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