JPS55124871A - Graph processor - Google Patents

Graph processor

Info

Publication number
JPS55124871A
JPS55124871A JP3372179A JP3372179A JPS55124871A JP S55124871 A JPS55124871 A JP S55124871A JP 3372179 A JP3372179 A JP 3372179A JP 3372179 A JP3372179 A JP 3372179A JP S55124871 A JPS55124871 A JP S55124871A
Authority
JP
Japan
Prior art keywords
output
register
mesh
bit
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3372179A
Other languages
Japanese (ja)
Inventor
Toshiyuki Ikezaki
Kunikazu Shigeta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3372179A priority Critical patent/JPS55124871A/en
Publication of JPS55124871A publication Critical patent/JPS55124871A/en
Pending legal-status Critical Current

Links

Landscapes

  • Image Processing (AREA)

Abstract

PURPOSE:To perform processing to specific bit of input graph, by memorizing whether or not graphic processing is made to a certain specific bit in quantizing graph as binarized standard mask in the memory in advance and collating it with the specific bit of the moon part of input graph. CONSTITUTION:The address signal to change the state of the mesh R5 at the center in response to the input graph state of 3X3 mesh consists of the lower rank 2-bit outputs a1, a2 of the shift register 2, output a3 of the register 3, lower 2-bit outputs a4, a5 of the shift register 4, lower 2-bit outputs a6, a7 of the shift register 8, and output a8 of the register 9. Further, the output in response to the address signal is outputted from the standard mask memory 10 and stored in the register 7(corresponding to the state output of central mesh of 3X3 mesh).
JP3372179A 1979-03-22 1979-03-22 Graph processor Pending JPS55124871A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3372179A JPS55124871A (en) 1979-03-22 1979-03-22 Graph processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3372179A JPS55124871A (en) 1979-03-22 1979-03-22 Graph processor

Publications (1)

Publication Number Publication Date
JPS55124871A true JPS55124871A (en) 1980-09-26

Family

ID=12394258

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3372179A Pending JPS55124871A (en) 1979-03-22 1979-03-22 Graph processor

Country Status (1)

Country Link
JP (1) JPS55124871A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58197582A (en) * 1982-05-14 1983-11-17 Hitachi Ltd Smoothing method of recognized pattern
JPS6257079A (en) * 1985-09-06 1987-03-12 Nec Corp Smoothing device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50122832A (en) * 1974-03-14 1975-09-26
JPS511033A (en) * 1974-06-24 1976-01-07 Hitachi Ltd 2 jigenpataanno zatsuonshorisochi
JPS52110529A (en) * 1976-03-15 1977-09-16 Toshiba Corp Noise erasing circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50122832A (en) * 1974-03-14 1975-09-26
JPS511033A (en) * 1974-06-24 1976-01-07 Hitachi Ltd 2 jigenpataanno zatsuonshorisochi
JPS52110529A (en) * 1976-03-15 1977-09-16 Toshiba Corp Noise erasing circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58197582A (en) * 1982-05-14 1983-11-17 Hitachi Ltd Smoothing method of recognized pattern
JPH0133871B2 (en) * 1982-05-14 1989-07-17 Hitachi Ltd
JPS6257079A (en) * 1985-09-06 1987-03-12 Nec Corp Smoothing device

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