JPS55121644A - Method of fabricating semiconductor substrate - Google Patents

Method of fabricating semiconductor substrate

Info

Publication number
JPS55121644A
JPS55121644A JP2907479A JP2907479A JPS55121644A JP S55121644 A JPS55121644 A JP S55121644A JP 2907479 A JP2907479 A JP 2907479A JP 2907479 A JP2907479 A JP 2907479A JP S55121644 A JPS55121644 A JP S55121644A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor substrate
monocrystal
silicon
remove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2907479A
Other languages
Japanese (ja)
Inventor
Kazutoshi Nagasawa
Masatake Kishino
Kazuhiko Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP2907479A priority Critical patent/JPS55121644A/en
Publication of JPS55121644A publication Critical patent/JPS55121644A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To prevent occurrence of crystal defect of a monocrystal semiconductor substrate during fabricating step in a method of fabricating a semiconductor substrate by etching to remove the surface of a thin semiconductor substrate cut from a monocrystal semiconductor ingot in uniform depth, and then heat treating the substrate in non-oxidizing atmosphere. CONSTITUTION:A silicon monocrystal ingot grown by a Czochralski method is cut into a thin silicon semiconductor substrate having a plane (100). This substrate is dipped, for example, in normal fluoric acid or nitric acid series silicon etching solution to each and remove the front and the back surfaces or one side surface in uniform depth such as 5-20mum. Then, the one side is, for example, mirror polished, boron ion is implanted to the one side of the substrate, and the substrate is heat treated in nitrogen atmosphere at 1050 deg.C. Thus, it can prevent the occurrence of crystal defect of the substrate during fabricating step.
JP2907479A 1979-03-13 1979-03-13 Method of fabricating semiconductor substrate Pending JPS55121644A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2907479A JPS55121644A (en) 1979-03-13 1979-03-13 Method of fabricating semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2907479A JPS55121644A (en) 1979-03-13 1979-03-13 Method of fabricating semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS55121644A true JPS55121644A (en) 1980-09-18

Family

ID=12266195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2907479A Pending JPS55121644A (en) 1979-03-13 1979-03-13 Method of fabricating semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS55121644A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5071776A (en) * 1987-11-28 1991-12-10 Kabushiki Kaisha Toshiba Wafer processsing method for manufacturing wafers having contaminant-gettering damage on one surface

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5071776A (en) * 1987-11-28 1991-12-10 Kabushiki Kaisha Toshiba Wafer processsing method for manufacturing wafers having contaminant-gettering damage on one surface

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