JPS55121583A - Pattern read system - Google Patents

Pattern read system

Info

Publication number
JPS55121583A
JPS55121583A JP3032079A JP3032079A JPS55121583A JP S55121583 A JPS55121583 A JP S55121583A JP 3032079 A JP3032079 A JP 3032079A JP 3032079 A JP3032079 A JP 3032079A JP S55121583 A JPS55121583 A JP S55121583A
Authority
JP
Japan
Prior art keywords
threshold
read
outputs
circuit
pattern read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3032079A
Other languages
Japanese (ja)
Inventor
Shigeki Kuga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP3032079A priority Critical patent/JPS55121583A/en
Publication of JPS55121583A publication Critical patent/JPS55121583A/en
Pending legal-status Critical Current

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  • Character Input (AREA)

Abstract

PURPOSE: To improve read reliability by mixing a difference between high and low threshold digital signals and a high threshold digital signal together, by a system which generates a pattern read signal by converting information, read by an array of photo sensors, into a digital value.
CONSTITUTION: Characters recorded on paper 1 are image-formed on the surface of photodiode array 4 via optical system 3. Photodiode outputs are inputted to comparator 5. Weighted photo sensor outputs in a unit are added and supplied to decision circuit 6, and a binary output signal is outputted by high-threshold binary coding circuit 7 and low-threshold binary coding circuit 8. The outputs of circuits 7 and 8 are inputted to exclusive-OR gate 9 to generate an additional bit signals correcting patterns and they are added to the output of circuit 7. Since patterns are corrected by additional bits, the reliability of a pattern read improves.
COPYRIGHT: (C)1980,JPO&Japio
JP3032079A 1979-03-14 1979-03-14 Pattern read system Pending JPS55121583A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3032079A JPS55121583A (en) 1979-03-14 1979-03-14 Pattern read system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3032079A JPS55121583A (en) 1979-03-14 1979-03-14 Pattern read system

Publications (1)

Publication Number Publication Date
JPS55121583A true JPS55121583A (en) 1980-09-18

Family

ID=12300496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3032079A Pending JPS55121583A (en) 1979-03-14 1979-03-14 Pattern read system

Country Status (1)

Country Link
JP (1) JPS55121583A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103486A (en) * 1983-11-09 1985-06-07 Sumitomo Electric Ind Ltd Optical reader

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103486A (en) * 1983-11-09 1985-06-07 Sumitomo Electric Ind Ltd Optical reader

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