JPS55114033A - Range conversion system - Google Patents

Range conversion system

Info

Publication number
JPS55114033A
JPS55114033A JP1963979A JP1963979A JPS55114033A JP S55114033 A JPS55114033 A JP S55114033A JP 1963979 A JP1963979 A JP 1963979A JP 1963979 A JP1963979 A JP 1963979A JP S55114033 A JPS55114033 A JP S55114033A
Authority
JP
Japan
Prior art keywords
level
output
register
range
gain circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1963979A
Other languages
Japanese (ja)
Inventor
Ikuro Moriwaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ANAROGU INTAAFUEESU KK
Original Assignee
ANAROGU INTAAFUEESU KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ANAROGU INTAAFUEESU KK filed Critical ANAROGU INTAAFUEESU KK
Priority to JP1963979A priority Critical patent/JPS55114033A/en
Publication of JPS55114033A publication Critical patent/JPS55114033A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To quicken the response of a range conversion system and also to simplify circuit constitution by converting an input level within a broad variation range into that within a fixed range and also by using the output of a register as an index signal indicating the absolute value of the converted level.
CONSTITUTION: The output level of programmable variable gain circuit VGA is compared with reference voltage Er and this output level, when less than the reference voltage, is registered in register SR. Then, the gain of programmable gain circuit VGA is controlled by the output of the register to obtain the level variation range of an input to programmable gain circuit VGA from the output of programmable variable gain circuit VGA as a level within a fixed range, and the output of register SR is used as an index signal showing the absolute value of the level within the above-mentioned fixed range.
COPYRIGHT: (C)1980,JPO&Japio
JP1963979A 1979-02-23 1979-02-23 Range conversion system Pending JPS55114033A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1963979A JPS55114033A (en) 1979-02-23 1979-02-23 Range conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1963979A JPS55114033A (en) 1979-02-23 1979-02-23 Range conversion system

Publications (1)

Publication Number Publication Date
JPS55114033A true JPS55114033A (en) 1980-09-03

Family

ID=12004782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1963979A Pending JPS55114033A (en) 1979-02-23 1979-02-23 Range conversion system

Country Status (1)

Country Link
JP (1) JPS55114033A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6681437B1 (en) 1999-04-30 2004-01-27 Ntt Advanced Technology Corporation Cleaning tool for optical fiber connectors

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5034772A (en) * 1973-08-01 1975-04-03
JPS5045506A (en) * 1973-08-27 1975-04-23

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5034772A (en) * 1973-08-01 1975-04-03
JPS5045506A (en) * 1973-08-27 1975-04-23

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6681437B1 (en) 1999-04-30 2004-01-27 Ntt Advanced Technology Corporation Cleaning tool for optical fiber connectors

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