JPS5496923A - Synchronizing separator circuit - Google Patents

Synchronizing separator circuit

Info

Publication number
JPS5496923A
JPS5496923A JP334178A JP334178A JPS5496923A JP S5496923 A JPS5496923 A JP S5496923A JP 334178 A JP334178 A JP 334178A JP 334178 A JP334178 A JP 334178A JP S5496923 A JPS5496923 A JP S5496923A
Authority
JP
Japan
Prior art keywords
signal
synchronous signal
level
switch
ghost
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP334178A
Other languages
Japanese (ja)
Other versions
JPS5745506B2 (en
Inventor
Masayuki Katakura
Masaru Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP334178A priority Critical patent/JPS5496923A/en
Publication of JPS5496923A publication Critical patent/JPS5496923A/en
Publication of JPS5745506B2 publication Critical patent/JPS5745506B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)

Abstract

PURPOSE: To secure the steady clamping for the vertical synchronous signal regardless of existence of the ghost wave and thus to ensure the steady operation by performing the synchronizing separation with the level average value of the vertical synchronous signal piled with the ghost set as the clamping level.
CONSTITUTION: The video signal sent from input terminal 1 is supplied to slice circuit 4 via reverse amplifier 3. The parallel circuit of resistance R1 and switch 2 is connected in parallel to amplifier 3. Then burst period switch 2 is set under the conducting state. Switch 2 rises up with delay of desired time td from starting time B of the period of vertical synchronous signal VD after equivalent pulse Hp within the vertical flyback time following wideo signal V and falls down at finishing period C of signal VD. The average of signal VD piled with ghost is set as the DC level which is induced at capacity C1 and supplied to circuit 4 to be used as the clamping level of power source 5. Then the synchronous signal is isolated from the video signal, and the synchronous signal is delivered to output terminal 6.
COPYRIGHT: (C)1979,JPO&Japio
JP334178A 1978-01-18 1978-01-18 Synchronizing separator circuit Granted JPS5496923A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP334178A JPS5496923A (en) 1978-01-18 1978-01-18 Synchronizing separator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP334178A JPS5496923A (en) 1978-01-18 1978-01-18 Synchronizing separator circuit

Publications (2)

Publication Number Publication Date
JPS5496923A true JPS5496923A (en) 1979-07-31
JPS5745506B2 JPS5745506B2 (en) 1982-09-28

Family

ID=11554650

Family Applications (1)

Application Number Title Priority Date Filing Date
JP334178A Granted JPS5496923A (en) 1978-01-18 1978-01-18 Synchronizing separator circuit

Country Status (1)

Country Link
JP (1) JPS5496923A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55147079A (en) * 1979-05-02 1980-11-15 Hitachi Ltd Separation circuit for vertical synchronizing signal
JPS59146268A (en) * 1983-02-09 1984-08-22 Matsushita Electric Ind Co Ltd Synchronizing separator

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0246564Y2 (en) * 1984-09-25 1990-12-07

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55147079A (en) * 1979-05-02 1980-11-15 Hitachi Ltd Separation circuit for vertical synchronizing signal
JPS59146268A (en) * 1983-02-09 1984-08-22 Matsushita Electric Ind Co Ltd Synchronizing separator
JPH027551B2 (en) * 1983-02-09 1990-02-19 Matsushita Electric Ind Co Ltd

Also Published As

Publication number Publication date
JPS5745506B2 (en) 1982-09-28

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