JPS5489532A - Cache memory having cache memory instructing circuit - Google Patents

Cache memory having cache memory instructing circuit

Info

Publication number
JPS5489532A
JPS5489532A JP15406278A JP15406278A JPS5489532A JP S5489532 A JPS5489532 A JP S5489532A JP 15406278 A JP15406278 A JP 15406278A JP 15406278 A JP15406278 A JP 15406278A JP S5489532 A JPS5489532 A JP S5489532A
Authority
JP
Japan
Prior art keywords
cache memory
instructing circuit
circuit
instructing
cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15406278A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6148745B2 (enrdf_load_stackoverflow
Inventor
Pii Raian Chiyaarusu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Original Assignee
Honeywell Information Systems Italia SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA filed Critical Honeywell Information Systems Italia SpA
Publication of JPS5489532A publication Critical patent/JPS5489532A/ja
Publication of JPS6148745B2 publication Critical patent/JPS6148745B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Transfer Systems (AREA)
  • Image Input (AREA)
JP15406278A 1977-12-16 1978-12-13 Cache memory having cache memory instructing circuit Granted JPS5489532A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US86122877A 1977-12-16 1977-12-16

Publications (2)

Publication Number Publication Date
JPS5489532A true JPS5489532A (en) 1979-07-16
JPS6148745B2 JPS6148745B2 (enrdf_load_stackoverflow) 1986-10-25

Family

ID=25335228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15406278A Granted JPS5489532A (en) 1977-12-16 1978-12-13 Cache memory having cache memory instructing circuit

Country Status (6)

Country Link
JP (1) JPS5489532A (enrdf_load_stackoverflow)
AU (1) AU521383B2 (enrdf_load_stackoverflow)
CA (1) CA1116756A (enrdf_load_stackoverflow)
DE (1) DE2854286A1 (enrdf_load_stackoverflow)
FR (1) FR2412139B1 (enrdf_load_stackoverflow)
GB (1) GB2010547B (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU529675B2 (en) * 1977-12-07 1983-06-16 Honeywell Information Systems Incorp. Cache memory unit
US4225922A (en) * 1978-12-11 1980-09-30 Honeywell Information Systems Inc. Command queue apparatus included within a cache unit for facilitating command sequencing
US4345309A (en) * 1980-01-28 1982-08-17 Digital Equipment Corporation Relating to cached multiprocessor system with pipeline timing
US4370710A (en) * 1980-08-26 1983-01-25 Control Data Corporation Cache memory organization utilizing miss information holding registers to prevent lockup from cache misses
JPS59136859A (ja) 1983-01-27 1984-08-06 Nec Corp バツフア制御装置
JPH0337955U (enrdf_load_stackoverflow) * 1989-08-24 1991-04-12
RU2238584C2 (ru) * 2002-07-31 2004-10-20 Муратшин Борис Фрилевич Способ организации персистентной кэш памяти для многозадачных, в том числе симметричных многопроцессорных компьютерных систем и устройство для его осуществления

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR111566A (enrdf_load_stackoverflow) * 1974-10-04

Also Published As

Publication number Publication date
GB2010547A (en) 1979-06-27
DE2854286A1 (de) 1979-06-28
JPS6148745B2 (enrdf_load_stackoverflow) 1986-10-25
FR2412139A1 (fr) 1979-07-13
GB2010547B (en) 1982-05-19
AU4242878A (en) 1979-06-21
FR2412139B1 (fr) 1986-05-09
DE2854286C2 (enrdf_load_stackoverflow) 1989-10-12
CA1116756A (en) 1982-01-19
AU521383B2 (en) 1982-04-01

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