JPS5482942A - Phase control system of clock signal - Google Patents

Phase control system of clock signal

Info

Publication number
JPS5482942A
JPS5482942A JP15087377A JP15087377A JPS5482942A JP S5482942 A JPS5482942 A JP S5482942A JP 15087377 A JP15087377 A JP 15087377A JP 15087377 A JP15087377 A JP 15087377A JP S5482942 A JPS5482942 A JP S5482942A
Authority
JP
Japan
Prior art keywords
clock signal
signals
signal
phase
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15087377A
Other languages
Japanese (ja)
Inventor
Tamotsu Noji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15087377A priority Critical patent/JPS5482942A/en
Publication of JPS5482942A publication Critical patent/JPS5482942A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce the dispersion of the phase of distribution clock signal, by providing the AND circuit taking the logical product between the synchronizing signal in synchronizing with the reference clock signal and the clock signal of a plurality distributed.
CONSTITUTION: The reference clock signal Co from the clock signal generator 1 is distributed to the distribution clock signal of C1 to C3 with the signal distributor 2 and is fed to the phase absorption circuit 4. The synchronizing signal B is fed to the circuit 4 from the oscillator 1, and the closk signals B1 to B3 adjusting the phase with the AND circuits 5 to 7 from the signal B and the signals C1 to C3 are fed to the computer 3. Taking that the maximum phase difference among the signals C1 to C3 is a and that for the synchronizing signal B and signals C1 to C3 is b, the maximum phase difference C among the output clock signals B1 to B3 of the AND circuits 5 to 7 is smaller than the phase difference a. Accordingly, the dispersion in the phase between clock signals is reduced.
COPYRIGHT: (C)1979,JPO&Japio
JP15087377A 1977-12-15 1977-12-15 Phase control system of clock signal Pending JPS5482942A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15087377A JPS5482942A (en) 1977-12-15 1977-12-15 Phase control system of clock signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15087377A JPS5482942A (en) 1977-12-15 1977-12-15 Phase control system of clock signal

Publications (1)

Publication Number Publication Date
JPS5482942A true JPS5482942A (en) 1979-07-02

Family

ID=15506235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15087377A Pending JPS5482942A (en) 1977-12-15 1977-12-15 Phase control system of clock signal

Country Status (1)

Country Link
JP (1) JPS5482942A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59105123A (en) * 1982-12-08 1984-06-18 Fujitsu Ltd Clock circuit
JPH07310465A (en) * 1995-06-21 1995-11-28 Nagasawa Seisakusho:Kk Handle setting seat for door

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59105123A (en) * 1982-12-08 1984-06-18 Fujitsu Ltd Clock circuit
JPH049337B2 (en) * 1982-12-08 1992-02-19
JPH07310465A (en) * 1995-06-21 1995-11-28 Nagasawa Seisakusho:Kk Handle setting seat for door

Similar Documents

Publication Publication Date Title
JPS5797751A (en) Circuit for adding artificial synchronizing signal
JPS5313913A (en) Digital music composition system
JPS5482942A (en) Phase control system of clock signal
JPS5398752A (en) Microprogram control system
JPS5443429A (en) Multiple series input process system
JPS5634267A (en) Synchronizing circuit
ES428221A1 (en) Control arrangement
JPS5587201A (en) Double system controller
JPS537165A (en) Synchronism detecting circuit of phase control circuit
JPS5575343A (en) Phase comparator circuit
JPS53109428A (en) Automatic clear circuit system
JPS5441014A (en) Clock signal generator circuit
JPS52113484A (en) Control system
JPS53133354A (en) Phase synchronizing circuit
JPS53115148A (en) Interruption control system
JPS51150911A (en) Multiple video signal digital converter
JPS5439519A (en) Separation circuit for vertical synchronism
JPS53142157A (en) Noise protection circuit
JPS5443415A (en) Pattern signal generator
JPS5532117A (en) Bus controlling device
JPS5357709A (en) Gen-lock for pal-system color television signal
JPS55159644A (en) Multiplex delay unit
JPS5318910A (en) Ghost reducing device
JPS53121533A (en) Multiplier circuit system
JPS5334242A (en) Device for controlling elevator