JPS5480056A - Clock signal generator - Google Patents
Clock signal generatorInfo
- Publication number
- JPS5480056A JPS5480056A JP14719677A JP14719677A JPS5480056A JP S5480056 A JPS5480056 A JP S5480056A JP 14719677 A JP14719677 A JP 14719677A JP 14719677 A JP14719677 A JP 14719677A JP S5480056 A JPS5480056 A JP S5480056A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- clock signal
- oscillation output
- oscillator
- suited
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 abstract 6
- 230000001360 synchronised effect Effects 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Inspection Of Paper Currency And Valuable Securities (AREA)
- Control Of Electric Motors In General (AREA)
Abstract
PURPOSE:To produce the clock signal suited for the device which is required a high speed by drawing out the oscillation output from the voltage control oscillator in the form of the clock signal synchronized with the power frequency fluctuation. CONSTITUTION:The following component units are provided: phase detector 12 which receives input signal VS(t)' of the power frequency and feedback signal VN(t)' and compares the frequency and the phase of both signals to generate the difference signal voltage corresponding to the frequency difference; LPF3 which reseives the difference signal from detector 12 and draws out the low frequency component; amplifier 4 to amplify the low frequency component sent from LPF3: and voltage control oscillator 5 whose oscillation frequency is controlled by the output volgage of amplifier 4. The oscillation output given from oscillator 5 is received, and then the frequency of the oscillation output is divided into the prescribed frequency of the oscillation output is divided into the prescribed frequency suited to the power frequency. At the same time, the oscillation output from oscillator 5 is divided though divider 7 forming the feedback signal to be drawn out in the form of the clock signal synchronized with the power frequency fluctuation. Thus, the clock signal suited to the device requiring a high carrier speed can be produced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14719677A JPS5480056A (en) | 1977-12-09 | 1977-12-09 | Clock signal generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14719677A JPS5480056A (en) | 1977-12-09 | 1977-12-09 | Clock signal generator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5480056A true JPS5480056A (en) | 1979-06-26 |
Family
ID=15424720
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14719677A Pending JPS5480056A (en) | 1977-12-09 | 1977-12-09 | Clock signal generator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5480056A (en) |
-
1977
- 1977-12-09 JP JP14719677A patent/JPS5480056A/en active Pending
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