JPS5479549A - Phase synchronizing control circuit - Google Patents

Phase synchronizing control circuit

Info

Publication number
JPS5479549A
JPS5479549A JP14680277A JP14680277A JPS5479549A JP S5479549 A JPS5479549 A JP S5479549A JP 14680277 A JP14680277 A JP 14680277A JP 14680277 A JP14680277 A JP 14680277A JP S5479549 A JPS5479549 A JP S5479549A
Authority
JP
Japan
Prior art keywords
signal
phase
cut
memory
phase difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14680277A
Other languages
Japanese (ja)
Inventor
Susumu Hanaoka
Yoshihiko Taniguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14680277A priority Critical patent/JPS5479549A/en
Publication of JPS5479549A publication Critical patent/JPS5479549A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To utilize the circuit for frequency-division multiplex communication, etc., by enabling it to operate with low power consumption and to attain rapid phase synchronization by controlling stable phase synchronization through phase comparison at a divided low frequency. CONSTITUTION:When reference signal (a) divided 1 is cut off, the update in memory 6 is stopped [The pulse width of phase difference signal (c) between signals (a) and (b) (outputs of phase comparator 2) is quantized and written in a stationary state] and the previous stage is memory-held. Then, voltage control crystal oscillator 4 free-scans until signal (a) arrives. When signal (a) is supplied again, the 2nd clock is regarded as its reference one to reset divider counter 7 by applying a reset pulse to it from reset pulse generator 5 and the contents of memory 6 are preset. As a result, comparator 2 is applied with the output signal of counter with a phase difference from the rise of the output signal of input divider 1 immediately before signal (a) is cut off, so that oscillator 4 will be applied with a control voltage equivalent to the phase difference right before signal (a) is cut off.
JP14680277A 1977-12-07 1977-12-07 Phase synchronizing control circuit Pending JPS5479549A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14680277A JPS5479549A (en) 1977-12-07 1977-12-07 Phase synchronizing control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14680277A JPS5479549A (en) 1977-12-07 1977-12-07 Phase synchronizing control circuit

Publications (1)

Publication Number Publication Date
JPS5479549A true JPS5479549A (en) 1979-06-25

Family

ID=15415853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14680277A Pending JPS5479549A (en) 1977-12-07 1977-12-07 Phase synchronizing control circuit

Country Status (1)

Country Link
JP (1) JPS5479549A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62126712A (en) * 1985-11-27 1987-06-09 Hitachi Ltd Pll circuit
WO2008124808A3 (en) * 2007-04-10 2008-12-18 Texas Instruments Inc Multi-phase interleaved oscillator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62126712A (en) * 1985-11-27 1987-06-09 Hitachi Ltd Pll circuit
WO2008124808A3 (en) * 2007-04-10 2008-12-18 Texas Instruments Inc Multi-phase interleaved oscillator
US7504895B2 (en) 2007-04-10 2009-03-17 Texas Instruments Incorporated Multi-phase interleaved oscillator

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