JPS5478633A - Machine number setting system - Google Patents

Machine number setting system

Info

Publication number
JPS5478633A
JPS5478633A JP14572777A JP14572777A JPS5478633A JP S5478633 A JPS5478633 A JP S5478633A JP 14572777 A JP14572777 A JP 14572777A JP 14572777 A JP14572777 A JP 14572777A JP S5478633 A JPS5478633 A JP S5478633A
Authority
JP
Japan
Prior art keywords
circuit
output
control circuit
input
machine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14572777A
Other languages
Japanese (ja)
Inventor
Hideo Asano
Tsuneki Mori
Isamu Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14572777A priority Critical patent/JPS5478633A/en
Publication of JPS5478633A publication Critical patent/JPS5478633A/en
Pending legal-status Critical Current

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  • Small-Scale Networks (AREA)

Abstract

PURPOSE: To decrease the number of the input/output terminal as well as to facilitate easy alteration of the machine numbers by taking the machine numbers into the control circuit while the system is being cleared for the system in which the machine number of the LSI-formed input/output control circuit is set outside the control circuit.
CONSTITUTION: The data process system comprises CPU10, LSI-formed input/ output control circuit 11 and input/output apparatus 12 which is controlled by circuit 11. In such process system, machine number setting circuit 13 is connected to circuit 11. Then register 22 to take the data of bus line 111 into control circuit 11, comparator circuit 21 to compare the output of register 22 with the output of data line 102 and address FF23 are installed respectively. And the machne number set through setting circuit 13 is taken into circuit 11 while system clear signal SCLR is delivered from CPU1.
COPYRIGHT: (C)1979,JPO&Japio
JP14572777A 1977-12-06 1977-12-06 Machine number setting system Pending JPS5478633A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14572777A JPS5478633A (en) 1977-12-06 1977-12-06 Machine number setting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14572777A JPS5478633A (en) 1977-12-06 1977-12-06 Machine number setting system

Publications (1)

Publication Number Publication Date
JPS5478633A true JPS5478633A (en) 1979-06-22

Family

ID=15391727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14572777A Pending JPS5478633A (en) 1977-12-06 1977-12-06 Machine number setting system

Country Status (1)

Country Link
JP (1) JPS5478633A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5659334A (en) * 1979-10-19 1981-05-22 Hitachi Ltd Device discrimination system
JPS6220059A (en) * 1985-06-28 1987-01-28 ハネイウエル・インフオメ−シヨン・システムス・インコ−ポレ−テツド Method and apparatus for alloting peference of channel number

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5659334A (en) * 1979-10-19 1981-05-22 Hitachi Ltd Device discrimination system
JPS6220059A (en) * 1985-06-28 1987-01-28 ハネイウエル・インフオメ−シヨン・システムス・インコ−ポレ−テツド Method and apparatus for alloting peference of channel number

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