JPS5478059A - Gain control circuit - Google Patents

Gain control circuit

Info

Publication number
JPS5478059A
JPS5478059A JP14495777A JP14495777A JPS5478059A JP S5478059 A JPS5478059 A JP S5478059A JP 14495777 A JP14495777 A JP 14495777A JP 14495777 A JP14495777 A JP 14495777A JP S5478059 A JPS5478059 A JP S5478059A
Authority
JP
Japan
Prior art keywords
transistor
signals
agc
intermediate frequency
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14495777A
Other languages
Japanese (ja)
Inventor
Tokuo Minami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14495777A priority Critical patent/JPS5478059A/en
Publication of JPS5478059A publication Critical patent/JPS5478059A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE: To cause a circuit to perform a sufficient AGC operation without making an AGC operation range narrower even for a large input by constituting the circuit so that AGC signals and manual gain regulating control signals may be applied to separate amplifier elements.
CONSTITUTION: Intermediate frequency input signals from terminal 1 are applied to intermediate frequency amplifier 16 through variable gain controlling transistor 6, and amplified signals are applied to AM detecting diode 22 through intermediate frequency transistor 27. Next, demodulated low frequency output signals are generated at terminal 25 and are taken out from the low pass filter consisting of resistance 19 and capacitor 18 and are applied to the base of transistor 6 through resistance 3, thereby operating AGC. In this constitution, emitters of the second and the third transistors 9 and 12 are connected to the collector of transistor 6, and further, the collector of one transistor 12 is provided with load resistance 13 to take out the output, and the base voltage of transistor 12 is changed by gain regulating variable resistor 15.
COPYRIGHT: (C)1979,JPO&Japio
JP14495777A 1977-12-05 1977-12-05 Gain control circuit Pending JPS5478059A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14495777A JPS5478059A (en) 1977-12-05 1977-12-05 Gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14495777A JPS5478059A (en) 1977-12-05 1977-12-05 Gain control circuit

Publications (1)

Publication Number Publication Date
JPS5478059A true JPS5478059A (en) 1979-06-21

Family

ID=15374117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14495777A Pending JPS5478059A (en) 1977-12-05 1977-12-05 Gain control circuit

Country Status (1)

Country Link
JP (1) JPS5478059A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105353213A (en) * 2015-12-15 2016-02-24 中国电子科技集团公司第四十一研究所 Waveform integral gain distribution method for spectrum analyzer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105353213A (en) * 2015-12-15 2016-02-24 中国电子科技集团公司第四十一研究所 Waveform integral gain distribution method for spectrum analyzer
CN105353213B (en) * 2015-12-15 2018-02-06 中国电子科技集团公司第四十一研究所 A kind of wave complete machine gain distribution method of spectrum analyzer

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