JPS5451811A - External memory control device - Google Patents

Abstract

PURPOSE: To make possible simultaneous detection of data read errors and address selection errors at the reading by employing the format written with the address information of sectors and the check pattern information according to data.

CONSTITUTION: The external memory control device applies the coincidence signal through comparison of the address information assigned with a processing unit and the sector address signal of a driving unit to a write data making circuit 36. The circuit 36 applies gap 21, synchronizing pattern part 22 subsequently to the write head. Next, the data 23 having been taken in a buffer register 31 are applied to the write head through the circuit 36 and the circuit 36 applies the check pattern 24 according to the write data to the write head through a check pattern forming circuit 34 to which the storage contents of the register 31 are applied. These cause recording of the format including the address information of the sector and the check pattern information according to the data to be performed in the tape and cause the data read errors and address selection errors to be simultaneously detected at the reading

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