JPS5448471A - Coding system - Google Patents

Coding system

Info

Publication number
JPS5448471A
JPS5448471A JP11465377A JP11465377A JPS5448471A JP S5448471 A JPS5448471 A JP S5448471A JP 11465377 A JP11465377 A JP 11465377A JP 11465377 A JP11465377 A JP 11465377A JP S5448471 A JPS5448471 A JP S5448471A
Authority
JP
Japan
Prior art keywords
signal
subtractor
circuit
delay circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11465377A
Other languages
Japanese (ja)
Other versions
JPS61743B2 (en
Inventor
Hideo Hashimoto
Takeshi Matsuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP11465377A priority Critical patent/JPS5448471A/en
Publication of JPS5448471A publication Critical patent/JPS5448471A/en
Publication of JPS61743B2 publication Critical patent/JPS61743B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

PURPOSE: To enable the high speed operation of the coding circiut, by placing the pre-filter performing the process of input signal at the pre-stage of the quantized circuit so that the differential coding can be made for the adjacent picture.
CONSTITUTION: The input signal PCM- operated for the input terminal 7 is subtracted by the signal value memorized in the delay circuit 9 with the subtractor 8. Result of subtraction is memorized for one time slot period with the circuit 9 and is inputted to the subtractor 10. As a result, on the signal line 11, the signal processed with the filter having the performance of 1/(1+z-1) is obtained, representing the performance of the preprocessing. Next, the subtractor 10 subtracts the signal value memorized with the delay circuit 12 from the signal on the signal line 11, and is quantized in the quantizer 13. The output of the delay circuit 14 is represented as including the amount of propagation delay for the both of the subtractor 10 and the quantizer 13, and the output of the circuit 14 is outputted via the signal line 15 and it is added with the output of the delay circuit 17 with the adder 16 in matching with the rising and trailing time
COPYRIGHT: (C)1979,JPO&Japio
JP11465377A 1977-09-26 1977-09-26 Coding system Granted JPS5448471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11465377A JPS5448471A (en) 1977-09-26 1977-09-26 Coding system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11465377A JPS5448471A (en) 1977-09-26 1977-09-26 Coding system

Publications (2)

Publication Number Publication Date
JPS5448471A true JPS5448471A (en) 1979-04-17
JPS61743B2 JPS61743B2 (en) 1986-01-10

Family

ID=14643180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11465377A Granted JPS5448471A (en) 1977-09-26 1977-09-26 Coding system

Country Status (1)

Country Link
JP (1) JPS5448471A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5995726A (en) * 1982-10-27 1984-06-01 ジ−メンス・アクチエンゲゼルシヤフト High speed dpcm encoder
JPS61146020A (en) * 1984-12-20 1986-07-03 Nippon Gakki Seizo Kk Signal processor
JPS62128214A (en) * 1985-11-29 1987-06-10 Toshiba Corp Forecast coding device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5995726A (en) * 1982-10-27 1984-06-01 ジ−メンス・アクチエンゲゼルシヤフト High speed dpcm encoder
JPS6320054B2 (en) * 1982-10-27 1988-04-26 Siemens Ag
JPS61146020A (en) * 1984-12-20 1986-07-03 Nippon Gakki Seizo Kk Signal processor
JPH039478B2 (en) * 1984-12-20 1991-02-08 Yamaha Corp
JPS62128214A (en) * 1985-11-29 1987-06-10 Toshiba Corp Forecast coding device

Also Published As

Publication number Publication date
JPS61743B2 (en) 1986-01-10

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